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DP83867E: Quesiton of HW reset vs SW reset

Part Number: DP83867E

Hi team,

Can you please review the followings? In some test, it's confirmed that link is not recovered after inputting RESET_N. (At that time, phy register seems to show link up.). On the other hand, the link is recovered in case of global reset.

1. What is the difference between H/W reset and Global reset based on above result?

2. At H/W reset, why does the RGMII communication error happen? Does the default settings after reset work?

3. When DP83867 is resetted by some noise impact, is there any method that SoC can recognize the reset?

4. This issue can be caused by schematic error? (However, the same symptom is duplicated even for over 1us RESET_N) 

Thanks and best Regards,

Sam Lee

  • Hello Sam,

    If I understand the problem correctly, you are observing that the PHY does not recover link if reset is applied via RESET_N pin but recovers link if reset is applied via register. Can you check the RESET_N pulse on an oscilloscope and ensure that it meets the datasheet requirement?

    1. Are you using the reset function in register 0x1F? This reset will reload the default register values but will not re-sample the straps. If there are any strap changes on the PHY then they will not take affect via a Software reset. Hardware reset loads the default values back into the registers and re-samples the straps.

    2. Is this error intermittent or continuous? RGMII has setup-hold requirements which can be met through board layout or internal delays. The default settings can work depending on the board layout. Are you seeing a problem where it works initially and then starts showing problems after HW reset?

    3. If there is noise on the RESET_N pin then this can cause the PHY to revert back to default register settings. Any register changes made via software will be lost. The MAC can read registers which are changed via software and check if they have went back to default setting. Another method would be to use the GPIO pin and configure it to be in a different mode than default (Constant 1 or 0), after HW reset this pin will fall back to its default setting.

    4. There is a possibility that this can be caused schematic error. Are there any pull down on the RESET_N pin? Are there any internal pull-down on the MAC pin which is connected to the RESET_N pin of DP83867E?

    -Regards,
    Aniruddha