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DP83867IR: how to know which packets are 1588

Part Number: DP83867IR
Other Parts Discussed in Thread: DP83867IS

Hi team,

I had a colleague ask some questions about implementing 1588 using the DP83867. I understand using SFD we can generate a signal to notify the MAC that a new frame has come in. I also see that in this post: https://e2e.ti.com/support/interface/ethernet/f/903/p/471008/1698162?tisearch=e2e-quicksearch&keymatch=1588#1698162 they mention that the MAC and upper layers will need to check if the frame is 1588.

The issue is that when a packet comes to the MAC another packet (which may or may not be accepted by this MAC) will trigger another pulse and now there is no way to determine which one belongs to the 1588 packet. Also, all modern MACs operate with a ring of buffers when packets will come in a quick succession pulses will accomplish every packet on the PHY but not all packets will end up in the MAC and get processed. So there is no 1:1 connection between packets in the buffers and timestamps captured upon SDF pulses on the PHY GPIO lines.

 

Do you have an example of 1588 implementation or at least AN that describes the way designers intended to use this PHY in 1588 applications?

 

Thanks,

Nate

  • Hi Nate,

    I am posting our email conversation below so that this question has more visibility.

    [1] DP83867IS has three Pattern Match Data Registers used for DA (destination address) match. If I use this register to issue a pulse on interrupt line upon receiving a packet with the multicast destination address for IEEE 1588 packet would I receive an interrupt corresponding to 1588 packet arrival or is it for individual addresses only? Should I use WAKE_ON_PATTERN bit in RXFCFG (0x0134) register to enable interrupt on this event?

    [Answer] If they configure it for matching only their address, then it will generate an interrupt for all packets directed towards that destination PHY. WOL for customer pattern detect would be a better option.

    [2] DP83867IS has 32 RXFPATx registers for 64 bytes of received packet, 4 RXFPBMx registers to compare 64 bytes and RXFPATC (0x161) to tell which bytes from SFD to start comparing with the provided pattern. What bit in RXFCFG (0x0134) register should I use when pattern successfully matches packet event?

    [Answer] For custom pattern detection they would need to set bit 1, 7, and 8 of register 0x0134. Bit 8 will change the WOL interrupt from pulse to Level mode. They will have to clear it via bit 11 after WOL interrupt has been used.

    [3] Is it used for WOL only or can I use these register to define pattern for 1588 packets?

    [Answer] WOL has to be enabled for pattern match to work. Custom pattern match is used for comparing the contents of the packet so they can be used for 1588 packets.

    [4] How Pattern Match Data Registers and RXFPATx work with each other?

    [Answer] Pattern Match Data register (RXFPMD-X) are used for storing the desired 64 byte magic packet data. This shouldn’t be used for triggering on 1588 packet. RXFPAT-X  registers will contain the desired custom received packet information. Receive Pattern Byte Mask Registers (RXFPBM-X) will mask information from RXFPAT-X which won’t be used for comparison with the incoming packet. For their application, RXFPAT-X and RXFPBM-X registers should be used.

    -Regards,

    Aniruddha