Other Parts Discussed in Thread: DP83867IS
Hi team,
I had a colleague ask some questions about implementing 1588 using the DP83867. I understand using SFD we can generate a signal to notify the MAC that a new frame has come in. I also see that in this post: https://e2e.ti.com/support/interface/ethernet/f/903/p/471008/1698162?tisearch=e2e-quicksearch&keymatch=1588#1698162 they mention that the MAC and upper layers will need to check if the frame is 1588.
The issue is that when a packet comes to the MAC another packet (which may or may not be accepted by this MAC) will trigger another pulse and now there is no way to determine which one belongs to the 1588 packet. Also, all modern MACs operate with a ring of buffers when packets will come in a quick succession pulses will accomplish every packet on the PHY but not all packets will end up in the MAC and get processed. So there is no 1:1 connection between packets in the buffers and timestamps captured upon SDF pulses on the PHY GPIO lines.
Do you have an example of 1588 implementation or at least AN that describes the way designers intended to use this PHY in 1588 applications?
Thanks,
Nate