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DP83867IR: "LOW_LATENCY_10_100_EN" bit filed(bit2) of RGMIICTL2 question

Oba
Genius 15770 points
Part Number: DP83867IR
Other Parts Discussed in Thread: DP83867CS,

Hello

 

I have a question for RGMIICTL2 register of DP838767.

 

In the application note, “Latency in Factory Automation(SLA240)”, there is a description about Latency Configuration on P6.

In this section, it is said that RGMIICTL2 has bit 2 bit field, “LOW_LATENCY_10_100_EN”.

 

But this bit2 bit field is reserved on DP83867IR/CR on the datasheet, although DP83867CS/IS/E supports this bit field.

Isn’t this bit2 supported on DP83867IR/CR ?

 

Regards,

Oba

  • 0
    TI__Mastermind 18425 points
    Hello Oba,

    The LOW_LATENCY_10_100_EN bit is applicable to the IR/CR datasheet as well. We will include that in the next revision.

    -Regards,
    Aniruddha
  • 0 in reply to Aniruddha Khadye
    TI__Genius 15770 points

    Hello,

     

    I have an additional question.

    I checked all differences between DP83867IR and DP8387IS registers.

     

    The followings are the registers/bit-fileds that have difference except for SGMII related registers.

    Are these register really difference? Or just missed to put it in the datasheet?

     

    1)IR has but IS doesn’t have

     

    100CR[3](0x0043) : BYPASS_4B5B_RX

    TDR_PEAKS_LOC_1(0x0190) - TDR_GEN_STATUS(0x01A4)

     

    2)IS has but IR doesn’t have

     

    RGMIICTL2[3](0x0033) : RGMII_AF_BYPASS_DLY_EN

    MMD3_PCS_CTRL(0x0000)

     

    Regards,

    Oba