• State TI Thinks Resolved
  • Locked Locked
  • Replies 8 replies
  • Answers 2 answers
  • Subscribers 32 subscribers
  • Views 1401 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DP83867E: DP83867E

Cedric Jamet
Prodigy 70 points
Part Number: DP83867E

Hi,

Do you have some experience with interfacing ALTERA ARRIA 10 and DP83867E in SGMII mode, more particulary about voltage level and hardware considerations ?

Cedric

  • 0
    TI__Mastermind 19780 points
    Hi Cedric,

    The SGMII requires AC coupling. SGMII works at all IO levels supported by the DP83867E. If the IO voltage is arbitrary in your design, it is recommended to use 2.5V or 3.3V. This allows you to directly drive LEDs unlike 1.8V.

    Please use the DP83867ERGZ-S-EVM as a reference design.

    Best Regards,
  • 0 in reply to Rob Rodrigues
    Prodigy 70 points

    Hi Rob,

    We have used 1.8V configuration on VDDIO, and we use AC coupling.

    I have checked level voltage on the SGMII lines. Please find below results: 

    -        ALTERA to PHY

    • Diff. Voltage : 1,1V
    • Common Mode :
      • before capa : 0,92V
      • After capa (Next to PHY) : 0.54V

    -        PHY to ALTERA

    • Diff. Voltage : 0.74V
    • Common Mode :
      • before capa (Next to PHY) : 0.82V
    • After capa : 0.67V

    Furthermore, Il would like to know if the PHY can read the ALTERA signal. How can I do that ? Is there any special register ?

    Thanks for your help,

    Cedric

  • 0 in reply to Cedric Jamet
    TI__Mastermind 19780 points
    Hi Cedric,

    One of the best ways to get an estimation of the functionality of your SGMII link, besides running network traffic over it, is to look at the SGMII auto-negotiation status.

    If SGMII auto-negotiation is completed, then the PHY and MAC have already exchanged data with each other, and can communicate.

    In the DP83867E/IS/CS devices, that status is stored in register address 0x0037. Note for the SGMII auto-negotiation process to be completed, you must have a valid link on the cable side of the DP83867.

    Best Regards,
  • 0 in reply to Rob Rodrigues
    Prodigy 70 points

    Hi Rob,

    thanks for informations.

    What about level voltage ? Do you think that's ok ?

    Cedric

  • 0 in reply to Cedric Jamet
    Prodigy 70 points

    And please find our schematic. Do you think it's correct Extract Schema.pdf

  • 0 in reply to Cedric Jamet
    TI__Mastermind 19780 points
    Hi Cedric,

    What do you mean about voltage level?

    Also, your schematic looks OK. I have 3 points.

    1. What voltage is powering the LVCMOS oscillator to the XI pin?

    2. Why don't you strap the DP83867E to SGMII mode?

    3. What transformer are you using?

    Best Regards,
  • 0 in reply to Rob Rodrigues
    Prodigy 70 points

    Hi Rob,

    For Voltage level, I sent you some measurement. (Voltage between PHY and  ALTERA ARRIA10)

    1. What voltage is powering the LVCMOS oscillator to the XI pin? : 1,8V

    2. Why don't you strap the DP83867E to SGMII mode? : Do you see a mistake in strap configuration ?

    3. What transformer are you using? : autonegociation on MDI line is working. We use F-CO-WE-7499111221A

    Thanks for your help

    Cedric

  • 0 in reply to Cedric Jamet
    Prodigy 70 points

    Hi Rob,

    In addition to the previous email, here's additional information.

    List of PHY registries that are changed as well as the written values:

    Configuring PHY registers


        Write in register 0x00: value 0x1140 for full duplex auto-negotiation
        Write in register 0x10: value 0x5808 for enable SGMII (default value normally)
        Write in register 0x14: value 0x2877 to disable SGMII auto-negotiation for MII loopback tests, if not loopback, we don't  write in this register
        Writing in the register 0xFE: value 0xE720 to configure the loopback, if not loopback, we don't  write in this register
        Write in register 0x1F: value 0x4000 to restart the PHY with the new values ​​of registers (restart necessary after previous change), if not loopback, we don't write in this register
        Write in the register 0x00: value 0x5140 for the loopback MII, if not loopback, we don't  write in this register
        Write in the register 0x1F: value 0x4000 to restart the PHY with the new values ​​of registers

    Best regards

    Cedric