Other Parts Discussed in Thread: DP83TC811SEVM
Dear TI:
Customer has layout question about DP83TC811S-Q1. Some other ethernet IC set the capacitors close to data transfer side(MAC and PHY), but the DP83TC811S-Q1 layout guide suggest close in receive side, the picture of datesheet as below:
The datasheet PIN function describe TX is input, RX is output.
So does the layout guide suggestion is correct? It is the characteristics of DP83TC811S-Q1?
Thanks!