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DS90UB914A-Q1: Dispersion histogram of internal oscillator

Guru 15540 points

Part Number: DS90UB914A-Q1

Hi,

Could you show me the actual dispersion of internal oscillator(nominal 20MHz) for our reference?

My customer worries that communication speed become slow by lower frequency.

Best Regards,

Kuramochi

  • Kuramochi-san,
    The typical variation of the internal 20MHz clock is +/- 30%. The minimum SCL high time is with the max freq of the internal clock of 26MHz.


    Training on FPD-Link Serializer Deserializer devices and system: https://training.ti.com/fpd-link-learning-center

    More information on IVI or ADAS FPD-Link products: http://www.ti.com/interface/fpd-link-serdes/overview.html

  • Guru 15540 points

    In reply to Palaniappan Manickam:

    Palaniappan-san,

    Thank you for your answer!

    Could you show the histogram or standard deviation of internal clock if you have the data?

    Best Regards,
    Kuramochi
  • Guru 15540 points

    In reply to TQ:

    Palaniappan-san,

    How is this situation?
    Best Regards,

    Kuramochi
  • In reply to TQ:

    The distribution should be contained within +/-30% as that is the typical internal clock variation. We do not have any histogram or standard deviation to provide.


    Training on FPD-Link Serializer Deserializer devices and system: https://training.ti.com/fpd-link-learning-center

    More information on IVI or ADAS FPD-Link products: http://www.ti.com/interface/fpd-link-serdes/overview.html

  • Guru 15540 points

    In reply to Palaniappan Manickam:

    Palaniappan-san,

    My customer requests to measure a histogram or standard deviation.
    Is it possible?
    I'm understanding that this is tough request.

    Best Regards,
    Kuramochi
  • In reply to TQ:

    Kuramochi-san,
    The distribution I mentioned of +/-30% is what we have and that should be sufficient information. The nominal freq is 20MHz, so the default SCL high time is set for the max possible 20MHz+30% of 26MHz .
    If the customer concern is not to exceed at the lower frequency, it would be safer to set the I2C speed to 70% of the freq. For eg if you did not want to exceed 400kHz, freq would be set for 0.7*400 = 280kHz and you would set the SCL high time and low time accordingly.


    Training on FPD-Link Serializer Deserializer devices and system: https://training.ti.com/fpd-link-learning-center

    More information on IVI or ADAS FPD-Link products: http://www.ti.com/interface/fpd-link-serdes/overview.html

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