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# PCA9539: I/O pin characteristics the same as SCL and SDA pins?

Part Number: PCA9539

For the PCA9539, the Vol plot is shown in Figure 4 in Section 6.8 and is labeled for I/O pins. I need to know if that also applies to the I2C pins (SDA and SCL).

Thank you!

• Hey Cassidy,

Figure 4 applies to the I/O pins and NOT the SDA/SCL pins. SDA/SCL are defined by I2C standard to be generate a maximum of 0.4V at 3mA of current draw, the the FETs on the I/O pins do not have this requirement.

Also, we have a TCA version of this device which is pin to pin to the PCA, more cost competitive, and has less strict POR requirements than the PCA family.

Thanks,
-Bobby
• In reply to TRX Bobby:

Thank you for your response!

Will the maximum Vol rise with increased current draw? Is there a plot you can point me to that may provide that detail?

Thank you!

• In reply to Cassidy Aarstad:

"Will the maximum Vol rise with increased current draw?"
Note: I am assuming we are talking about SDA as SCL does not have a VoL
Yes, you can think of the pull down FET on SDA as an impedance when turned on therefore V=I*Z. Increasing the current will generate a larger Voltage but the simple solution to this is to not choose a strong pull up resistor as that dictates the current through the FET. This answer also is dependent on the Vcc value on 9539 as this plays a role in the impedance generated.

"Is there a plot you can point me to that may provide that detail?"
We do not have anything like this. Typically if you are worried about VoL from the slave, you would just increase the pull up resistance to lower the current.

-Bobby

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