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  • Resolved

DS90UB954-Q1: MIPI output issue

Prodigy 140 points

Replies: 9

Views: 278

Part Number: DS90UB954-Q1

Hi Teams,

I'm using 913 send 10bit RAW video to 954, and generate MIPI data to video grabber. But our grabber cannot recognize this MIPI data packet. (data CRC ok, but cannot split these data into a frame)

I have checked with another camera, some differences at the end of the data packet.

Please let me know any else I can try.

Thanks.

Imager: 1300*1000px 10bit DVP 96MHz PCLK

Serializer: 913A

+STP cable

Deserializer: 954 port1

Setting

Deserialzer:

0x1f,0x03 //400mbps per lane (problem still exists at 800mbps)

0x33,0x03 //4lane, continous clk

0x20,0x10 //Enabled FWD for RX Port 1, disabled FWD for RX Port 0

0x4c,0x12 //FPD3_PORT_SEL port1

(I2C pass through/I2C alias)

0x7c,0x01 // FV,LV setting

0x70,0x6b // RAW10 DT

0x6d,0x73 // 913A 10-bit STP mode

0x10,0xc5 //Enable 954 GPIO0,1 OUTPUT FV and LV 0x11,0xe5

0xbc,0x80 // FV_MIN_TIME (problem still exists at 0x00)

Serializer:

0x05,0x25 //overrides to 10bit mode

Current status:

PASS, LOCK : high

No forward channel parity error

913 PCLK detect: STABLE, HIGH

0x73,0x74 = DEC1300 line

0x75,0x76 = DEC 2000 byte

No CRC error occurs on video grabber

HSYNC, VSYNC output on 954, almost the same with sensor side. (VSYNC inverted)

FV-LV=690us, =66240*PCLK

MIPI data

Camera B is a 12bit raw camera using 913 and coax.

It can be displayed on the same backend grabber via 954.

  • Hello,

    please move setting register 0x20 and 0x33 till the end of your sequence, and after you configure your camera.

    Also it looks like you are only configuring Port1, not Port0. Can you confirm?

    Regards,

    Hamzeh

    ------------------------------------------------------------------------------------------------------------------------------------------------

    Training on FPD-Link Serializer Deserializer devices and system: https://training.ti.com/fpd-link-learning-center

    More information on IVI or ADAS FPD-Link products: http://www.ti.com/interface/fpd-link-serdes/overview.html

  • In reply to Hamzeh Jaradat:

    Hi Hamzeh,

    The port0 are unused for our application.

    We will try to move 0x20 and 0x33 to the end of sequence after sensor configuration.

    Is the waveform of MIPI have something problem?

    Thanks.

  • In reply to RoyChen776:

    Hi Roy,

    If it relates to V_sync polarity mismatch issue, you can try modify b0-b1 at PORT_CONFIG2 (0x7C) in 954. Thanks!

    Regards,

    Alex

  • In reply to Alex Yeh:

    Hi Alex,

    If 0x7c bit [0:1] mismatched, MIPI will have not signal...

    And we change to 914 platform today, the video can be displayed on backend grabber.

    So I think it has some issue on 954.

  • In reply to RoyChen776:

    Hello Roy,

    again for my understanding. Camera A is working fine and you have correct MIPI data at the 954 output, but Camera B is not okay. Correct?

    can you share with me the following register values for both cases:

    0x04, 0x3B, 0x4C, 0x4D, 0x4E, 0x58, 0x6D, 0x70, 0x71, 0x73, 0x74, 0x75, 0x76

    Regards,

    Hamzeh

    ------------------------------------------------------------------------------------------------------------------------------------------------

    Training on FPD-Link Serializer Deserializer devices and system: https://training.ti.com/fpd-link-learning-center

    More information on IVI or ADAS FPD-Link products: http://www.ti.com/interface/fpd-link-serdes/overview.html

  • In reply to Hamzeh Jaradat:

    Roy,

    Any feedback?

    Regards,

    Hamzeh

    ------------------------------------------------------------------------------------------------------------------------------------------------

    Training on FPD-Link Serializer Deserializer devices and system: https://training.ti.com/fpd-link-learning-center

    More information on IVI or ADAS FPD-Link products: http://www.ti.com/interface/fpd-link-serdes/overview.html

  • In reply to Hamzeh Jaradat:

    Camera A is not okay. Camera B is working fine.

    CAMERA A CAMERA B
    0x04 D3 DF
    0x3B 01 01
    0x4C 12 01
    0x4D 53 13
    0x4E 45 45
    0x58 58 58
    0x6D 73 7E
    0x70 6B 2B
    0x71 6C 2C
    0x73 03 02
    0x74 E8 D0
    0x75 06 07
    0x76 59 80

    Thanks.

  • In reply to Alex Yeh:

    Thanks Alex for the local support.

    This problem is occurred by 954 0x70.

    We need set bit [7:6] to "00", not "01"

  • In reply to RoyChen776:

    Hi Roy,

    It’s great we solve the issue. We misunderstood the 7:6 bit of 0x70 is input channel. It’s Virtual Channel that we need to reprogram it back to VC0 because you’re using RX1 for camera input, the default value of its setting is 0x01 which is VC1.

    Regards,

    Alex

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