There is a plan to change the PC16552D to NS16C2552.PC16552D is for end of production.The data sheet of NS16C2552 has the following description of "RECEIVER SAMPLING CLOCK"."P32 of the NS16C2552, NS16C2752 data sheet The UART receiver has an internal sampling clock that is 16X the data rate.The sampling clocks allow data to be sampled at the 6/16 to 7/16 point of each bit.”There is no description of "RECEIVER SAMPLING CLOCK" in the data sheet of NS16C2552Would you tell us the "SAMPLING CLOCK to allow RECEIVER DATA" of PC16552D.
The PC16552D samples data 33 nano seconds after the 8th rising edge of the receiver sampling clock.
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In reply to TRX Bobby:
Hello Bobby.Thank you very much for your answer.I understand the RECEIVER DATA timing.
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