Part Number: TL16C754C
It is nice to know you here. My customer is evaluating TL16C754C. And they met below issue,
Please help look into this issue and find the root cause. Thanks.
What you are likely seeing is a framing error related to the errata for this device:
The work around is also described in the document above^^
We are glad that we were able to resolve this issue, and will now proceed to close this thread.
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In reply to BOBBY:
Thank you for your help here. From our test, we think this is not the bit errata problem. If we do not read register value during reading FIFO data, we can get all the data. The main question is how we make sure that we have read all the data in the FIFO? The main method we use is to read the LSR register to check the statue.
In reply to Lin_Charles:
Just to confirm, you mean when they read the LSR after they send a byte and then read the byte it's incorrect but if they ignore the LSR (don't read it) until all the data is sent, they get the correct values?
Also, how many values are they sending maximum (and minimum)?
You are right. No matter how much data sent, the result is the same. However, if TL16C554A is used, no issue happen. So we may need your help to find the root cause.Thanks.
MY apologies, I seemed to have overlooked this thread. Are you still having issues with this?
To answer another question you had, you can check to see if all the bytes from the RX FIFO is read by also checking the RXRDY pin of the device.
Is it possible to add some delays in your code to read the bytes with more breaks in between? (Maybe wait a few miliseconds before pulling IOR low?)
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