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TUSB1210 Intermittent Clock Output and ULPI Interface Issues

Noah Root
Prodigy 120 points
Other Parts Discussed in Thread: TUSB1210

Hello,

I am working with a TUSB1210 on a custom design and I have run into several issues. First, after power up, I am not seeing an output clock on pin 26. This behavior seems intermittent in that sometimes I see a 60 MHz clock and other times the output signal remains at 0 V. I am implementing a host USB device, much like the design shown on page 48 of the datasheet (besides having an input reference clock). I have enabled CS by using a 4.7k ohm pull-up to VDDIO (1.8VDC) and strapped the CFG pin to 1.8VDC via a 4.7k ohm pull-up. I am providing a 26 MHz square wave into the PHY. I have verified the reset into the TUSB1210 is being released high. I have verified the +3.3VDC input for VBAT is being provided before the VDDIO/VDD18 supply (approximately 200 us before). Any insight to this issue?

Furthermore, when a 60 MHz clock is being driven out, I am unable to communicate over the ULPI bus from my link controller to the PHY. I see the data bits driven on the busy from the Link controller, but no response from the PHY. 

Any help would be greatly appreciated. 

Thanks,

Noah