Hello,
I am working on a design based on Xilinx's reference design. I want to replace the Marvell PHY in that design with DP83867CR.
Due to some constraints, the design requires 100BASE-TX. Below is the PHY section of the schematics.
VCCMIO is 1.8V. I have used the two supply configuration to avoid power sequencing issues mentioned in data sheet. Power up sequence is 1.0V->1.8V->2.5V per Zynq's PUP sequencing requirements.
I omitted surge protection in this diagram but it will be added later.
I would appreciate your feedback on the diagram above (is it OK? Is there something missing?)
I have another question, software related. I saw in another topic ( second post of ) about auto-negotiation being disabled. Does Linux driver support this? Is some configuration or modification required to do it or the driver takes care of it when it is loaded? I am asking this because we try to rely on available software and keep it as pristine as possible to avoid maintenance nightmares.
Thank you in advance.