DS90UB913A-Q1: 913-914　PCLK jitter

Masaaki Sugiyama68

Part Number: DS90UB913A-Q1

Dear Support team

I have two questions about the PCLK jitter specification.

In the 913A datasheet, which of "cycle to cycle jitter" and "Period jitter" is the "PCLK Input Jitter (PCLK from imager mode) "?

In the 914A datasheet, is the "Receiver Clock Jitter(tRCJ)" specification for output PCLK?

Best Regards,

Masaaki Sugiyama

over 5 years ago

0 Palaniappan Manickam over 5 years ago

TI__Genius 10475 points

Hello,
Typically for the PCLK jitter for the oscillator they will specify output jitter in their datasheet. If you are trying to measure on the bench, this should be the total jitter within the FPD-Link CDR loop bandwidth as specified in the 913A datasheet.
You're correct tRCJ is for the PCLK.

0 Masaaki Sugiyama68 over 5 years ago in reply to Palaniappan Manickam

Expert 1445 points

Dear Palaniappan-san;

Thank you for your quick support.

Does the 913A specification of "PCLK Input jitter(PCLK from imager mode)" mean which "cycle to cycle jitter" or "period jitter"?

Best Regards,

Masaaki Sugiyama

0 Masaaki Sugiyama68 over 5 years ago in reply to Masaaki Sugiyama68

Expert 1445 points

Dear Palaniappan-san;

Could you reply me?

Best Regards,

Masaaki Sugiyama

0 Palaniappan Manickam over 5 years ago in reply to Masaaki Sugiyama68

TI__Genius 10475 points

Sugiyama-san,
The accurate way to measure this would be to look at the TIE (Time interval error) jitter or phase jitter (TIE is the time domain representation of phase noise). This compares the tested clock against an ideal clock instead of comparing to itself like the period or cycle to cycle jitter, so more accurate.

0 Masaaki Sugiyama68 over 5 years ago in reply to Palaniappan Manickam

Expert 1445 points

Dear Palaniappan-san;

Thank you for your reply.
The 913A specification of "PCLK Input jitter(PCLK from imager mode)" means "TIE (Time interval error) jitter".
Is this correct?

Best Regards,
Masaaki Sugiyama

0 Palaniappan Manickam over 5 years ago in reply to Masaaki Sugiyama68

TI__Genius 10475 points

Yes it should be TIE. The jitter should be measured within the CDR loop bandwidth.

Interface

Interface forum

DS90UB913A-Q1: 913-914　PCLK jitter

Interface

Interface forum

DS90UB913A-Q1: 913-914 PCLK jitter

DS90UB913A-Q1: 913-914　PCLK jitter