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Linux/DS90UB960-Q1: DS90UB960 setting inquiry

Part Number: DS90UB960-Q1

Tool/software: Linux

Hi ,

   We have DS90UB954-EVM & DS90UB953 for developing the SerDes solution and successfully implemented on our platform. Currently,we want to use 4-port solution DS90UB960 to replace DS90UB954,but experience the no signal output from 960. I have check the datasheet of 954 and 960,the register settings are the same if just want to use one port(Port 1) for the test. So I am wondering if there is any settings different from 954? Attached the DS90UB954 settings. Thanks.

regards,

Sean

DS90UB954-setting.txt
void DS90UB954_setup(void)
{
 	    struct i2c_client * ds90ub954_client; 
        struct i2c_adapter * ds90ub954_adap = i2c_get_adapter(TI_I2C_BUS_NUM); // 2 means i2c-2 bus
        ds90ub954_client = i2c_new_dummy (ds90ub954_adap, 0x3d); // 0x40 - slave address on i2c bus
        
	    //select PORT0
	    i2c_smbus_write_byte_data(ds90ub954_client, 0x4c,0x01);
	    
	    //disable link parity error
	     i2c_smbus_write_byte_data(ds90ub954_client, 0xb6,0x18);
	     
	     //disable DISABLE_DCA_CRC
	    i2c_smbus_write_byte_data(ds90ub954_client, 0xba,0x83);
	    
	    //TRF Control Setting to 0x3f
	    i2c_smbus_write_byte_data(ds90ub954_client, 0xb0,0x04);  //CH0:04,CH1:08,CH2:0C,CH3:10
	    i2c_smbus_write_byte_data(ds90ub954_client, 0xb1,0x04);  // TRF(STP)
	    i2c_smbus_write_byte_data(ds90ub954_client, 0xb2,0x3f);  // from 00 to 3f
	    i2c_smbus_write_byte_data(ds90ub954_client, 0xb1,0x14);  // TRF(COAX)
	    i2c_smbus_write_byte_data(ds90ub954_client, 0xb2,0x3f);  // from 00 to 3f
	    
	    //adjust EQ default settings to 0x20
	    i2c_smbus_write_byte_data(ds90ub954_client, 0xb0,0x04);  //CH0:04,CH1:08,CH2:0C,CH3:10
	    i2c_smbus_write_byte_data(ds90ub954_client, 0xb1,0x0e);  // 
	    i2c_smbus_write_byte_data(ds90ub954_client, 0xb2,0x20);  // from 00 to 7
	    
	    //adjust EQ Floor default settings to Min, 0xf0
	    i2c_smbus_write_byte_data(ds90ub954_client, 0xd5,0xf0);  // set to minimum
	     
	     //adjust adaptive S-Filter default settings
	     i2c_smbus_write_byte_data(ds90ub954_client, 0x40,0x00);   //adjust adaptive EQ to Dynamic S-Filter 0x40=0x00
	     i2c_smbus_write_byte_data(ds90ub954_client, 0x42,0x71);   //disable default 2-step adaptation
	      i2c_smbus_write_byte_data(ds90ub954_client, 0x41,0xe0);  //set S-Filter range to Min and Max 0x41=0xe0    
	      
	      i2c_unregister_device(ds90ub954_client);    
}

void DS90UB954_CSI_enable(void)
{
	    struct i2c_client * ds90ub954_client; 
        struct i2c_adapter * ds90ub954_adap = i2c_get_adapter(TI_I2C_BUS_NUM); // 2 means i2c-2 bus
        ds90ub954_client = i2c_new_dummy (ds90ub954_adap, 0x3d); // 0x40 - slave address on i2c bus
        
         i2c_smbus_write_byte_data(ds90ub954_client, 0x33,0x23);  //Set CSI_EN and set to continuous clock mode,2 lanes
         msleep(500); 
         
          i2c_smbus_write_byte_data(ds90ub954_client, 0x20,0x20); //Set forwarding of RX port 0 to CSI output  
         msleep(500); 
         
         //Set up Back Channel Config (0x58)
          i2c_smbus_write_byte_data(ds90ub954_client, 0x58,0x9e); //0xbe 
          
          //Set up Ser Alias ID
           i2c_smbus_write_byte_data(ds90ub954_client, 0x5b,0x30); //The ID of 953 is 0x18 (7-bit address)
           i2c_smbus_write_byte_data(ds90ub954_client, 0x5c,0x30); //The ID of 953 is 0x18 (7-bit address)
           
           //set up Slave/Camera ID
            i2c_smbus_write_byte_data(ds90ub954_client, 0x5d,0xd8); //camera id is 0xd8 (8-bit address)  
            //i2c_smbus_write_byte_data(ds90ub954_client, 0x5d,0x30); //camera id is 0xd8 (8-bit address)  
            
            //set up Slave/Camera ID
            i2c_smbus_write_byte_data(ds90ub954_client, 0x65,0xd8); //camera id is 0x6c (7-bit address)  
            //i2c_smbus_write_byte_data(ds90ub954_client, 0x65,0x30); //camera id is 0xd8 (8-bit address)  
            
            i2c_unregister_device(ds90ub954_client);  
 }

  • yes, most reg. names are same between ub954 and ub960. for this case, pls:
    1. i2c can be assessed?
    2. run the UB960's pattern gen., does it work or not?
    3. pls be careful of the CSI2 lane setting and forwarding setting. ub960 has 4 channels while ub954 has 2channel, if syn. mode is enabled, the used channel video signal (alive or not) would impact the forwarding.

    regards,
    Steven
  • Hi Steven,

    Our current design is CPU/CSI <--> DS90UB960 <---> FPD LINK-III <--> DS90UB953/Camera module.
    Now we can access Camera and let Camera working from CPU to Camera through FPD LINK-III. And also can measure the the signal at the joint of FPD LINK and UB960( port 1). We have another platform can verify the function segment of FPD LINK-III <--> DS90UB953/Camera module. FPD LINK-III <--> DS90UB953/Camera module is working on our another project,this is not problem. Regarding your point 2 suggestion, do you mean to gen the pattern to CPU/CSI interface for verifying the 960? Is there any register of 960 that can response the status of decoding? We are wondering if the signal from 953 can be decoded by 960 or not.

    regards,
    Sean
  • you can check the data type, error line data etc. from 0x4e/0x4d, 0x73~0x76.

    regards,
    Steven