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DS90UB953-Q1: Question on Link Margin

Mitchell
Expert 4915 points
Part Number: DS90UB953-Q1

Hi Team,

My customer and I have come across the FPD-Link Margin Analysis Program (MAP). It appears that this only covers the forward channel, though. Is there anything of this sort for the back channel (BCC), or is the assumption that if the forward channel has margin, then the BCC is going to be just fine?

In addition to the above question, are there any settings on the serializer side that can be tweaked to give insight into the link margin, or is the forward channel TX side simply fixed? We noticed that the '953 has a set of indirectly accessible registers for the FPD3 TX.

Thanks in advance for your help,
Mitchell

  • 0
    TI__Mastermind 21685 points
    Mitchell,
    Idea behind margin analysis program is to help customers evaluate link margin and eye condition by manually sweeping EQ Level and strobe position and monitoring for loss of lock or errors. You can look at this app note for more information

    www.ti.com/.../snla301

    Thanks,
    Vishy
  • 0 in reply to Vishy Viswanathan
    TI__Expert 4915 points
    Hi Vishy,

    Correct, we've already discovered this application note and read through it.

    It appears that this only covers the forward channel, though. Is there anything of this sort for the back channel (BCC), or is the assumption that if the forward channel has margin, then the BCC is going to be just fine?

    Let me know if my question makes sense

    Thanks,
    Mitchell
  • 0 in reply to Mitchell
    TI__Mastermind 21685 points
    Mitchell,

    MAP is only for forward channel. Only if lock is established and forward channel works fine, back channel communication can take place.

    You may already know about on chip BIST (built in self test). By running BIST, we can check both forward channel and back channel errors.

    Thanks,
    Vishy