Hi!
My customer is reviewing SERDES with the following block
H/U Side : H/U SoC -> (HDMI/TMDS) -> DS90UB949 => (Single FPD Link)=>DS90UB940 -> MIPI CSI-2 -> Cluster SoC
The Pixel clock demanded by the final Cluster SOC is the same as the calculation formula below and is 27.72Mhz.
Cluster BVM image display area: 720x480
Pixel Clock = (Include Blank) 880*525*30(FPS)*2 = 27.72MH
Considering the loss of SERDES,Can you advise how much of the TMDS Clock value we should input into the serializer from the headunit to send 27.72 Mhz on the Cluster SOC side.
Pleas check it.
Thank you
Best Regards.
From Anthony.