DP83867IR: IO_IMPEDANCE_CTR

kenshow

Part Number: DP83867IR

Hi,

I am confused about IO_IMPEDANCE_CTR. I have questions as follows:

What is "TRIM" in described I/O configuration of register map in data sheet? It is not described in "8.6 Register Maps".

Because this impedance values are process dependent, is it individually set to 50 Ω in TI's manufacturing process? The default value is different for each device?

What % is the tolerance?

Regards,
Kenshow

over 4 years ago

0 Aniruddha Khadye over 4 years ago

TI__Mastermind 18425 points

Hi Kenshow,

TRIM means that during test the register value is fixed in order to maintain 50ohm impedance. Since process has some effect on the impedance, not all devices will have the same default value. The default register value can be different for different devices but the default impedance will be 50ohms. We don't publish the tolerance information in the datasheet so its not possible to share internal information.

-Regards

Aniruddha

Interface

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DP83867IR: IO_IMPEDANCE_CTR