Hi Team,
Our board USB port that from USB3.0 HUB, now can’t work if plug USB device during bios post display.
Previous design review schematic as attachment. Would you kindly share debug suggestion for us, thanks.
In our design pin 50 connect 1uF cap to GND.
From spec define below, there is no power-on relationship between VDD33 and VDD unless GRSTz is only connected to a capacitor to GND.
Then VDD must be stable minimum of 10 µs before the VDD33.
Could we NOPOP C835 to ignore power timing requirement for VDD and VDD33?
Thanks