SN65HVD888: spice model of SN65HVD888

Hi TI engineers.

one correction of my question.

I could NOT find the model in 

http://www.ti.com/design-resources/design-tools-simulation/models-simulators/spice-library.html

BR 

Hi Max.

Thank you for your reply and I'm sorry to be lare.

I will check our circuit simulator if this IBIS model can be imported or not.

Please wait for few days.

Best Regards.

Hi Max,

I imported IBIS model into our circuit simulator as following pin settings.

Pin names

IBIS - RealSN888(Pin#)

PU  - Vcc(8)

PD  - GND(5)

T   - D(4)

E  - DE((3)

IO_N - A(6)

IO_I  - B(7)

DigO  - R(1)

PC   -  +5VonSchem

GC  -  GNDonSchem

SN889's REZ(1) is not found in IBIS.

Transient result is that DigO "H" was rinsing up to +1.0V not up to +5V. Could you tell me how to correct ?

Best Regards.

Hello,

The "DigO" port of an IBIS model is intended to give the digital logic output state of that model during the simulation - 1 V for high and 0 V for low.  If you are trying to model the characteristics of the R pin, you would need to use a tri-state output buffer component and associate it with the R pin of the SN65HVD888 IBIS model.  Once you do this you should see the full 5-V signal swing.

(Note something that is confusing to many users accustomed to SPICE is that IBIS does not model the full functionality of the chip.  Instead, each IO is modeled individually.  So, you could simulate the RS-485 signal lines to see if they give a proper waveform in your application and you could simulate the "R" output and its connection to a UART/MCU, but the IBIS model itself wouldn't drive the "R" output based on the state of the "A"/"B" pins.)

Regards,
Max

I'm happy to hear you've found a solution.  Thank you for the update.

Regards,
Max