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TCAN4550-Q1: TCAN 4550 transmit CANFD mess error

Part Number: TCAN4550-Q1
Other Parts Discussed in Thread: TCAN4550

we can use tcan4550 transmit a 8 byte data successfully ,but  a canfd message can't ,the list code

configuration  part 

/*
* Configure the TCAN4550
*/
void TCAN4550_Init(void)
{
TCAN4x5x_Device_ClearSPIERR(); // Clear any SPI ERR flags that might be set as a result of our pin mux changing during MCU startup

/* Step 1 attempt to clear all interrupts */
TCAN4x5x_Device_Interrupt_Enable dev_ie = {0}; // Initialize to 0 to all bits are set to 0.
TCAN4x5x_Device_ConfigureInterruptEnable(&dev_ie); // Disable all non-MCAN related interrupts for simplicity

TCAN4x5x_Device_Interrupts dev_ir = {0}; // Setup a new MCAN IR object for easy interrupt checking


TCAN4x5x_Device_ReadInterrupts(&dev_ir); // Request that the struct be updated with current DEVICE (not MCAN) interrupt values

if (dev_ir.PWRON) // If the Power On interrupt flag is set
{
TCAN4x5x_Device_ClearInterrupts(&dev_ir); // Clear it because if it's not cleared within ~4 minutes, it goes to sleep
}


/* Configure the CAN bus speeds */
TCAN4x5x_MCAN_Nominal_Timing_Simple TCANNomTiming = {0};

TCANNomTiming.NominalBitRatePrescaler = McanArbRateSet[0];
TCANNomTiming.NominalTqBeforeSamplePoint = McanArbRateSet[1];
TCANNomTiming.NominalTqAfterSamplePoint = McanArbRateSet[2];

TCAN4x5x_MCAN_Data_Timing_Simple TCANDataTiming = {0};

TCANDataTiming.DataBitRatePrescaler = McanDatRateSet[0];
TCANDataTiming.DataTqBeforeSamplePoint = McanDatRateSet[1];
TCANDataTiming.DataTqAfterSamplePoint = McanDatRateSet[2];



/* Configure the MCAN core settings */
TCAN4x5x_MCAN_CCCR_Config cccrConfig = {0}; // Remember to initialize to 0, or you'll get random garbage!
cccrConfig.FDOE = 1; // CAN FD mode enable
cccrConfig.BRSE = 1; // CAN FD Bit rate switch enable
cccrConfig.NISO = 0;
cccrConfig.DAR = 0;



/* Configure the default CAN packet filtering settings */
TCAN4x5x_MCAN_Global_Filter_Configuration gfc = {0};
gfc.RRFE = 1; // Reject remote frames (TCAN4x5x doesn't support this)
gfc.RRFS = 1; // Reject remote frames (TCAN4x5x doesn't support this)
gfc.ANFE = TCAN4x5x_GFC_ACCEPT_INTO_RXFIFO0; // Default behavior if incoming message doesn't match a filter is to accept into RXFIO0 for extended ID messages (29 bit IDs)
gfc.ANFS = TCAN4x5x_GFC_ACCEPT_INTO_RXFIFO0; // Default behavior if incoming message doesn't match a filter is to accept into RXFIO0 for standard ID messages (11 bit IDs)



/* ************************************************************************
* In the next configuration block, we will set the MCAN core up to have:
* - 1 SID filter element
* - 1 XID Filter element
* - 5 RX FIFO 0 elements
* - RX FIFO 0 supports data payloads up to 64 bytes
* - RX FIFO 1 and RX Buffer will not have any elements, but we still set their data payload sizes, even though it's not required
* - No TX Event FIFOs
* - 2 Transmit buffers supporting up to 64 bytes of data payload
*/
TCAN4x5x_MRAM_Config MRAMConfiguration = {0};
MRAMConfiguration.SIDNumElements = 16; // Standard ID number of elements, you MUST have a filter written to MRAM for each element defined
MRAMConfiguration.XIDNumElements = 0; // Extended ID number of elements, you MUST have a filter written to MRAM for each element defined

MRAMConfiguration.Rx0NumElements = 16; // RX0 Number of elements
MRAMConfiguration.Rx0ElementSize = MRAM_64_Byte_Data; // RX0 data payload size

MRAMConfiguration.Rx1NumElements = 0; // RX1 number of elements
MRAMConfiguration.Rx1ElementSize = MRAM_64_Byte_Data; // RX1 data payload size

MRAMConfiguration.RxBufNumElements = 0; // RX buffer number of elements
MRAMConfiguration.RxBufElementSize = MRAM_64_Byte_Data; // RX buffer data payload size

MRAMConfiguration.TxEventFIFONumElements = 4; // TX Event FIFO number of elements

MRAMConfiguration.TxBufferNumElements = 4; // TX buffer number of elements
MRAMConfiguration.TxBufferElementSize = MRAM_64_Byte_Data; // TX buffer data payload size


/* Configure the MCAN core with the settings above, the changes in this block are write protected registers, *
* so it makes the most sense to do them all at once, so we only unlock and lock once */

TCAN4x5x_MCAN_EnableProtectedRegisters(); // Start by making protected registers accessible

TCAN4x5x_MCAN_ConfigureCCCRRegister(&cccrConfig); // Enable FD mode and Bit rate switching
TCAN4x5x_MCAN_ConfigureGlobalFilter(&gfc); // Configure the global filter configuration (Default CAN message behavior)

TCAN4x5x_MCAN_ConfigureNominalTiming_Simple(&TCANNomTiming); // Setup nominal/arbitration bit timing
TCAN4x5x_MCAN_ConfigureDataTiming_Simple(&TCANDataTiming); // Setup CAN FD timing

TCAN4x5x_MRAM_Clear(); // Clear all of MRAM (Writes 0's to all of it)
TCAN4x5x_MRAM_Configure(&MRAMConfiguration); // Set up the applicable registers related to MRAM configuration

TCAN4x5x_MCAN_DisableProtectedRegisters(); // Disable protected write and take device out of INIT mode

/* Set the interrupts we want to enable for MCAN */
TCAN4x5x_MCAN_Interrupt_Enable mcan_ie = {0}; // Remember to initialize to 0, or you'll get random garbage!
mcan_ie.RF0NE = 1; // RX FIFO 0 new message interrupt ENABLE
mcan_ie.TCE = 1; // Transmission Completed Interrupt ENABLE
mcan_ie.BOE = 1; // Bus_Off Status Interrupt ENABLE
mcan_ie.TOOE = 1; // Timeout Occurred Interrupt ENABLE
mcan_ie.MRAFE = 1; // Message RAM Access Failure Interrupt ENABLE
mcan_ie.TFEE = 1; // Tx FIFO Empty Interrupt ENABLE
// mcan_ie.word = 0XFFFFFFFF;

TCAN4x5x_MCAN_ConfigureInterruptEnable(&mcan_ie); // Enable the appropriate registers


/* Setup filters, this filter will mark any message with ID 0x055 as a priority message */
TCAN4x5x_MCAN_SID_Filter SID_ID = {0};
SID_ID.SFT = TCAN4x5x_SID_SFT_CLASSIC; // SFT: Standard filter type. Configured as a classic filter
SID_ID.SFEC = TCAN4x5x_SID_SFEC_PRIORITYSTORERX0; // Standard filter element configuration, store it in RX fifo 0 as a priority message
SID_ID.SFID1 = 0x055; // SFID1 (Classic mode Filter)
SID_ID.SFID2 = 0x7FF; // SFID2 (Classic mode Mask)
TCAN4x5x_MCAN_WriteSIDFilter(0, &SID_ID); // Write to the MRAM


// /* Store ID 0x12345678 as a priority message */
// TCAN4x5x_MCAN_XID_Filter XID_ID = {0};
// XID_ID.EFT = TCAN4x5x_XID_EFT_CLASSIC; // EFT
// XID_ID.EFEC = TCAN4x5x_XID_EFEC_PRIORITYSTORERX0; // EFEC
// XID_ID.EFID1 = 0x12345678; // EFID1 (Classic mode filter)
// XID_ID.EFID2 = 0x1FFFFFFF; // EFID2 (Classic mode mask)
// TCAN4x5x_MCAN_WriteXIDFilter(0, &XID_ID); // Write to the MRAM

/* Configure the TCAN4550 Non-CAN-related functions */
TCAN4x5x_DEV_CONFIG devConfig = {0}; // Remember to initialize to 0, or you'll get random garbage!
devConfig.SWE_DIS = 0; // Keep Sleep Wake Error Enabled (it's a disable bit, not an enable)
devConfig.DEVICE_RESET = 0; // Not requesting a software reset
devConfig.WD_EN = 0; // Watchdog disabled
devConfig.nWKRQ_CONFIG = 0; // Mirror INH function (default)
devConfig.INH_DIS = 0; // INH enabled (default)
devConfig.GPIO1_GPO_CONFIG = TCAN4x5x_DEV_CONFIG_GPO1_MCAN_INT1; // MCAN nINT 1 (default)
devConfig.FAIL_SAFE_EN = 0; // Failsafe disabled (default)
devConfig.GPIO1_CONFIG = TCAN4x5x_DEV_CONFIG_GPIO1_CONFIG_GPO; // GPIO set as GPO (Default)
devConfig.WD_ACTION = TCAN4x5x_DEV_CONFIG_WDT_ACTION_nINT; // Watchdog set an interrupt (default)
devConfig.WD_BIT_RESET = 0; // Don't reset the watchdog
devConfig.nWKRQ_VOLTAGE = 0; // Set nWKRQ to internal voltage rail (default)
devConfig.GPO2_CONFIG = TCAN4x5x_DEV_CONFIG_GPO2_NO_ACTION; // GPO2 has no behavior (default)
devConfig.CLK_REF = 1; // Input crystal is a 40 MHz crystal (default)
devConfig.WAKE_CONFIG = TCAN4x5x_DEV_CONFIG_WAKE_BOTH_EDGES; // Wake pin can be triggered by either edge (default)

TCAN4x5x_Device_Configure(&devConfig); // Configure the device with the above configuration

TCAN4x5x_Device_SetMode(TCAN4x5x_DEVICE_MODE_NORMAL); // Set to normal mode, since configuration is done. This line turns on the transceiver

TCAN4x5x_MCAN_ClearInterruptsAll(); // Resets all MCAN interrupts (does NOT include any SPIERR interrupts)


}

and  test part



Devmode = TCAN4x5x_Device_ReadMode();
TCAN4550_Init();
Devmode = TCAN4x5x_Device_ReadMode();
TCAN4x5x_MCAN_Interrupt_Enable Int_Config ={0};

TCAN4x5x_MCAN_ReadInterruptEnable(&Int_Config); //read the interrupt register and make sure the correct configuration


/***/


TCAN4x5x_MCAN_TX_Header header = {0}; // Remember to initialize to 0, or you'll get random garbage!
header = header;

header.ID = 0x0636; // Set the ID
header.DLC = MCAN_DLC_16B; // Set the DLC to be equal to or less than the data payload (it is ok to pass a 64 byte data array into the WriteTXFIFO function if your DLC is 8 bytes, only the first 8 bytes will be read)

header.FDF = 1; // CAN FD frame enabled
header.BRS = 1; // Bit rate switch enabled
header.EFC = 0;
header.MM = 0;
header.RTR = 0;
header.XTD = 0; // We are not using an extended ID in this example
header.ESI = 0; // Error state indicator

UINT32 reg = 0;


while(1)
{

TCAN4x5x_MCAN_ReadInterrupts(&Mcan_ir); // Read the interrupt register
TCAN4x5x_MCAN_ClearInterruptsAll();

TCAN4x5x_MCAN_ReadInterrupts(&Mcan_ir); // Read the interrupt register
TCAN4x5x_MCAN_ReadInterruptEnable(&Int_Config); //read the interrupt register and make sure the correct configuration


PaloadData[0] = loopctrl;
loopctrl ++;
DataNum = TCAN4x5x_MCAN_WriteTXBuffer(0, &header, PaloadData); // This line writes the data and header to TX FIFO 1
SendFlg = TCAN4x5x_MCAN_TransmitBufferContents(0); // Request that TX Buffer 1 be transmitted


osDelay(1000);
}

is there anyting error ,please  

  • Hello,

    Does CAN FD work if operated at a lower data rate? If so, there may be an issue related to the physical layer signaling.  If not, then it is more likely a configuration issue.  Are you able to check the CANH and CANL signals on an oscilloscope to make sure they look as expected? And, what kind of errors are you detecting when communication does not work?

    Regards,

    Max

  • HI Max 
    Thanks for you help and reply 
    we use a professional device(we called CANFD box ) to receive the message form tcan4550,and  it can not be received . and set  "NominalBitRatePrescaler "as 1000K  ,"DataBitRatePrescaler " as 2000k
    all the program are from TI' demo,only a little difference. I've been working with TDA3X for some days ,from my point of view  their CANFD IP  are very similar ,so some basic configuration is not suppose to be error . 
    and  the most puzzling thing is that if I change the box to standard mode, when I send 16 byte,the box can receive the first 8 byte correctly  ,and  the DLC 's value is 0x0a but not 0x08.
    please help me check the program of the last email ,can you find any errors ?
    Best Regards and thanks again 
    Wei Xu
  • Hi Wei,

    Can you provide the actual register values of the TCAN4550 following the configuration?  It will be easier to review the configuration and determine if there are any bits set incorrectly by looking at the values at the time of data transmission.  Since I don't have your complete source code, I have to make some assumptions about the what bits are being set, what bits are being left in their default configuration, etc. and the process is more difficult.

    Please provide the values for any registers being configured by the micro controller. Once you provide me these values I can review it and even try to duplicate your setup if needed.

    Also, if your configuration is correct, it could be helpful to read the interrupt and status registers to determine if there are any error or event codes being set that might indicate the source of the problem you are experiencing.  I think it is best to first verify the device configuration, but if it is possible to log those register values as well, that information might be helpful to me as well.

    Best Regards,

    Jonathan Nerger