This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
Part Number: SN65LVPE504
I have an one PCIe x4 lane interface, one Molex x4 Lane PCIe connector and a SN65LVPE504.
How can I connect this three component?
Thanks for helping.
The SN65LVPE504 is a 4 channel device. To fully implement a 4-lane PCIe link 2 devices would be required.
Root Complex -> LVPE504 -> Endpoint
Root Complex <- LVPE504 <- Endpoint
We are glad that we were able to resolve this issue, and will now proceed to close this thread.
If you have further questions related to this thread, you may click "Ask a related question" below. The newly created question will be automatically linked to this question.
In reply to Lee Sledjeski:
PCIe TX (x4) -> LVPE504 (RX pins?) and output of LVPE504 (TX pins) -> My Connector (RX),
PCIe RX (x4) <- LVPE504 (RX pins?) and output of LVPE504 (TX pins) <- My Connector (TX),
I am confused, because LVPE504 input pin name is RX?
Thanks for Helping.
In reply to user5803443:
The naming convention can get confusing. For PCIe it is probably best to start with the CEM connector specification which is present in most PCIe links. For this connector the following conventions are used.
PETpx and PETnx pins (the Transmitter differential pair of the connector) must be connected to the PCI Express Transmitter differential pair on the system board, and to the PCI Express Receiver differential pair on the Add-in Card.
PERpx and PERnx pins (the Receiver differential pair of the connector) shall be connected to the PCI Express Receiver differential pair on the system board, and to the PCI ExpressTransmitter differential pair on the Add-in Card.
This is shown in the graphic below which a different 4 channel PCIe redriver is connected to the CEM connector on an Add-in-Card. The signals highlighted by the green boxes are connected to the CEM gold fingers on the Add-in-Card
Thanks for helping. My PCIe channel Gen2 (5Gbps), because I am not use CEM connector, not necessary for me.
My system have x4 Lane PCIe signals this for signals goes to Molex x4 Lane connector and this connector connect x4 PCIe cable, end of this cable connect host board this host board have same Molex connector
and this connector signal goes to PCIe Card edge connector. I want to connect only my signals and connector side together.
PCIe Tx ---> SN65LVPE504 ---> Molex Connector Rx
Molex Connector Tx ---> SN65LVPE504 ---> PCIe Rx
Right? Other signals (Not inside green boxes) represent my PCIe channel? Add in card part access with x4 cable connector. (https://www.onestopsystems.com/product/pcie-x4-cable)
I have another quuestion for you, I saw the above grapics you did not use ac coupling capacitor and I did not see AC coupling value in the datasheet of SN65LVPE504.
This link suggest 220nF capacitor necessary for design?
Should I use AC coupling capacitor for my design?
The signals in the Green boxes are connected to the computer. The PER and PET signals not in the Green boxes are connected to the system endpoint. In my case it is a SSD.
The 220nF capacitors are not shown in this small picture, but they are included in the schematic design. In most PCIe systems you should include AC coupling capacitors on the Tx outputs of your board. The Rx inputs should already have AC coupling on another board in the system like the motherboard or the SSD.
I can understand your reply but my question is not related your reply. On my system I have only x4 Lane PCIe, SN65LVPE504 and PCIe x4 Molex Connector.
I want to connect this three component. Have left side and right side same connection ?
I searched the datasheet of SN65LVPE504 maximum AC coupling value as below. Can I use 200nF capacitor?
The upstream connector - going to the 4x cable will have Tx pins or signals which should be connected to the redriver inputs. The connector Rx pins or signals should be connected to the redriver Tx pins. There should be 0.22 uF coupling capacitors on these signals.
I completed my design as below.
Is there any error?
And I want to use SN65LVPE504RUAR for x1 lane PCIe. In the datasheet not information about unused pin.
What can I do this unused pin?
I have updated the signal flow in your picture. Generally with PCIe signals you only need to put capacitors on the redriver Tx outputs.
The unused inputs and outputs can be left floating.
All content and materials on this site are provided "as is". TI and its respective suppliers and providers of content make no representations about the suitability of these materials for any purpose and disclaim all warranties and conditions with regard to these materials, including but not limited to all implied warranties and conditions of merchantability, fitness for a particular purpose, title and non-infringement of any third party intellectual property right. No license, either express or implied, by estoppel or otherwise, is granted by TI. Use of the information on this site may require a license from a third party, or a license from TI.
TI is a global semiconductor design and manufacturing company. Innovate with 100,000+ analog ICs andembedded processors, along with software, tools and the industry’s largest sales/support staff.