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PCA9306: issue：step-up voltage and Spike voltage

Zhihong Huang
Intellectual 1550 points
Part Number: PCA9306

Hi Team

     Here are my customer’s issue:

  

  1. In his schematic, there is a step-up voltage about 0.25V which should be 0 V in SDA1,SDA2,SCL1 and SCL2.  Could you help me analysis the source of the step-up voltage and recommend me a pull-up resistor value(R115 R116 R117 R118) according to his design and step-up voltage?

2. There is also a 1V Spike voltage in every 0 status lasting 0.15us in SDA1 and SDA2 happening everytime the SDA changes from 0 to 0.25V. But the whole system is still working normally and the I2C data could be read and written normally ，Could you help analysis the source of the Spike voltage and how to solve these?

3. In his new schematic, he connect the enable PIN to 1.8V, but he know that this connection is not recommended according in the datasheet, so he want to know what negative consequence could happen if he has to make this change?

Best Regards,

Wesley Huang

 

Field Application Engineer,China

Texas Instruments Semiconductor Technologies (Shanghai) Co., Ltd

Cell : +86-189-2449-8998

Email: wesley-huang@ti.com

    

  • 0
    TI__Guru 62910 points

    Hi Wesley,

    Is it possible the different devices on the bus have different "VOL" levels, some close to 0 V and some close to 250 mV?  That's what this looks like to me.  I say that since the variation in low level amplitude tends to occur after 8 bits, meaning it is likely that another device pulls low on bit 9 to acknowledge the byte transfer.  (Also, PCA9306 should not introduce these kinds of voltage shifts - electrically, it will just act as a small series resistance when either side is at a low level.)

    Similarly, the spike that occurs is most likely due to there being some gap in time between when one device releases the bus and another one pulls it low (e.g., to signal an "ACK").

    It is OK to tie EN to 1.8 V.  The impact of this is that the PCA9306 will only start to conduct between channels when either side drops below ~1.2 V.  This can slightly increase propagation delays.  Let me know if this isn't clear or if you have any further questions.

    Regards,
    Max

  • 0 in reply to Max Robertson
    TI__Intellectual 1550 points

    Hi Max

               Thanks for you replying! I also has two question for you:

    1. Can I decrease this difference between the two VOL levels via adapting the Rpu(R115 R116 R117 R118) ?

    2. From his design, do you think the value of pull-up resistor is suitable，if not,can you recommend me a pull-up resistor value(R115 R116 R117 R118) according to his design and step-up voltage?

    3. if the spike  is due to  some gap in time between when one device releases the bus and another one pulls it low, what can I do next to solve it or shrink it?

    Regards,
    Wesley

  • 0 in reply to Zhihong Huang
    TI__Guru 62910 points

    Wesley,

    Are you seeing any communication issues?  If not, then none of these things are problems and you don’t need to change anything.  If you wanted to decrease the difference in VOL levels, though, I’d recommend higher pull-up resistances.  This should reduce the current that each I2C driver needs to sink during low periods, so even if one of them has a higher effective pull-down resistance (leading to a 0.25-V step) the output low voltage amplitude would reduce.  The spike is an issue of timing – there is a delay between when one node releases the bus and another pulls it down.  Perhaps it could best be addressed in software, but higher pull-up resistances and increased load capacitance would help to smooth it out.

    Regards,
    Max

  • 0 in reply to Max Robertson
    TI__Intellectual 1550 points

    Hi Max

    1. I don't quite understand about "It is OK to tie EN to 1.8 V.  The impact of this is that the PCA9306 will only start to conduct between channels when either side drops below ~1.2 V.  This can slightly increase propagation delays. could you explain more specifically about why the EN to 1.8V could cause the delay ? and how to value this delay?

    2. My customer connect to the EN via a 200k resistor to 1.8V,could you please help me double check with this kind of connection?

     

    Regards,
    Wesley

  • 0 in reply to Zhihong Huang
    TI__Mastermind 48215 points

    Hi Wesley,

    PCA9306 uses the voltage at the EN pin as a reference for when to "connect" both sides. In the recommended configuration, this voltage is Vcc1 + Vth (see Figure 6).

    With a reference voltage below this value (Vcc1), Both sides will have to pull lower before PCA9306 begins to propagate the low. While the reference is still well above typical Vol's, this point will be later on the falling edge of the signal where the device will begin to react. This effectively shows up as a larger propagation delay through the device. 

    It is alright to us EN in this way if slightly increased propagation delay is acceptable. 

    Can you confirm that there is also a 200k-Ohm or similar resistance between Vcc2 and Vref2 in the new schematic? If this is not done when Vcc2 > Vcc1 +  Vth there can be a large current from Vcc2 through the device. 

    Regards,

    Eric