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No signal on TXA or B output of TL16C752BPT

Hello,

I have a part TL16C752BPT, I can read and writ the registers of this component. But When i want send data to TX output, I have nothing. I write a data on THR register, next the TXRDY output is at '1'.I suppose that the data is staied in the THR registers, but I don't why the data is not to send on TXA or B output.

The regsiters are configured with initial values (no fifo, mode0, no auto cts, no auto rts, etc..)

Best Reagrds

  • Hello,

    Would you please further describe the process in your setup?


    Is the channel receiving a Clear To Send (CTS) input?
    What is the status of the FIFO Ready Register (FIFORdy) before trying to send data? - Does it reflect that there is data held in THR? (be sure TLR is set so that FIFORdy will trigger when data of sufficiently small size is present in THR).
    What does the Modem Status Register (MSR) hold when trying to send data? - Does it show CTS input LOW?
    Would your setup allow for scope probes on the TX lines to confirm that no communication is attempted by the device? Is it possible the receiving device does not recognize the data?

    Let me know if you'd like me to elaborate on any of these questions.

    Regards,
    Eric

  • Hello Eric,

    In the first my process is very simple, the component is reset after the data $AA is written in THR regsiter and I wait an event on TX line.

    There is no signal on CTS input and i don't need to put CTS at '0', because the auto-CTS is disabled : "Without auto-CTS, the transmitter sends any data present in the transmit FIFO and a receiver overrun error can result." (datasheet of TL16C752B page 6)

    Before write data in THR, FIFO Ready register was at $03 and LSR is at $60. And after the value register FIFO Ready was always at $03 and LSR is at $00. I think that the data are in THR and TSR register, but it was not transmissed to FIFO. Datasheet page 25 : "The THR receives data and shifts it into the TSR where it is converted to serial data and moved out on the TX terminal. If the FIFO is disabled, the FIFO is still used to store the byte."

    I don't need to set the TLR register, because the component is set Mode 0 and the FIFO is disabled.

    For the moment, there is a probe scope connected on TX output, no others devices are connected.

    Thank You

  • Thank you for providing that info.

    Since bit6 of LSR changes from 1 to 0 indicating that "Transmitter hold AND shift registers are not empty", it sounds like data is being successfully loaded into the THR. This and the fact that you are able to successfully read and write to the device would suggest that the data-bus interface is working correctly.

    Have you programmed a baud rate for the device in DLL and DLH? If these registers are both 0, no baud clock is generated and the UART is effectively disabled. Keep in mind that these registers cannot be written to when the device is in sleep mode. Also note that these registers are not reset by the top-level reset signal RESET.

    Let me know if this solves the problem. 

    Regards,

    Eric

  • Indeed, I have written DHL and DLL at 0. I didn't focus on these registers, because I didn't want to divide the clock.

    Thank you.