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LMH1219: Equalizer issue in 12G-SDI mode

Part Number: LMH1219
Other Parts Discussed in Thread: LMH1218

Hello.

We've faced issue with LMH1219 which looks like over-equalization in one of our designs.

Our device is 12G-SDI I/O board (based on Xilinx's FPGA) with two inputs (LMH1219) and two outputs (LMH1218). Outputs seems working good in 12G mode - video can be received by 3rd-party 12G-SDI devices, inputs works adequate only in <=6G-SDI mode. First of all, circuit:

We have some own software, that can read/write LMH12xx registers and read eye diagram.

Case 1: 3rd party 12G-SDI converter as source, short (0.5m) belden 4855R cable. Here is eye diagram:

in this case LMH1219 de-asserts lock_n (lost lock) several times per second, also we can see a lot of bit erros in SDI stream. Interesting thing, that if we disable cable equalizing (reg 0x27 = 0x0c) everything starts working perfectly, and eye looks like:

Case 2: Board output (LMH1218) as source, short (0.5m) belden 4855R cable. Everything getting worse:

LMH1219 never asserts lock_n (always unlocked), disabling equalizer leads to case 1 (with eq enabled).

What could be the reason for this behavior?

Also, I was thinking that our PCB design may be imperfect (it came from old 3G-SDI design):

(latter is nearest GND layer, all other layers has similar cutouts)

Can such pcb design cause this issue?

  • Hi Konstantin,

    How about if you use a longer cable? For example 30m. Do you see the same thing? In this case, eye diagram looks fine?

    Regards,, nasser

  • Hi.

    For now, we haven't long 12G-rated cables, we should get it on next week.

    However, I've tried old 3G-rated 5m belden cable, and it acts a bit more stable with 3rd party converter. Here is eye right after cable plugged (eq enabled):

    lock_n is stable, we can see video stream with no errors. But after some time (several seconds) it returns to:

    and bit errors.

    LMH1218 outputs also looks a bit better with this cable:

    but still, no stable lock.

  • Hi Konstantin,

    1). I believe i had responded to this E2E post however i don't see my earlier response. I believe you were expecting longer B1694A cable and you were going to use this cable to see if you can duplicate this issue. Here is what we suggest: Did you revceive this cable and what is the result?

    2). Please use a longer cable and provide register dump for the LMH1219 device.

    3). Use your short cable - less than 0.5m - after observing lock/un-lock - please dump register settings.

    We can review these two register settings to see if we can understand what could be going on here.

    Regards,, Nasser

  • Hello.

    We had received long cable (100ft) and device was able to receive own signal with it.

    After consulting with other nearby engineers with experience in 12G-SDI and electromagnetic field solver, we'd found serious issues with our PCB design:

    1. Terribly wrong cut-holes around connector's central pin - more than 3/4 of signal was reflecting back to cable right at 12-13GHz because of them. This explains why we had problems with own signal and short cables - signal reflects two times at short distance, long cables reduce reflected signal to level where equalizer can handle it.
    2. Wrong side of connectors - EQ and CD were placed at same side as through-hole connectors. Part of connector pin from top PCB layer (where it connects to trace) to other side was acting like antenna.
    3. A bit small cutouts under input capacitor, too short negative pin termination, etc.

    For testing, we made some hardware modification (warning: this photo may not be appropriate for some engineers):

    And this helped a lot - now we are able to stable receive 12G-SDI video from several different sources (including Phabrix Qx) using both long, short, even 4GHz-rated cables. Our modified output is also accepted by converters and analyzer (perfect jitter, complaining about bit slow edges). However, loopback with short cables (< 2m) is still issue - I believe that drilled hole and hand-soldered wire isn't perfect for 12GHz.

    So, now, we've redesigned our PCB using electromagnetic field solver:

    Hope this time we'll have no issues, will respond when PCB will be fabricated

  • Hi Konstantin,

    Thanks for the updates.

    Reviewing your new pcb layout BNC anti-pad, there are some comments:

    1). Return loss/TDR measurement should show this as well. It might be a good idea to do these measurements - using your field solver - with the old and new pcb layout. First to make sure you can see the problem and then secondly the new layout takes care of the problem.

    2). Please check with your BNC connector vendor. They should provide you with the optimum anti-pad or pcb layout for the connector.

    3). Given your new pcb layout that you have shown above, i am wondering if cable driver may cause some imbalance on the EQ unused input? This could be like cross talk where it may affect your long cable reach. Is there a way to check this with your field solver?

    4). If you like, please send me your new pcb layout for review. Is this available in .brd Allegro from Cadence or if this is not available please send me your gerber.

    Regards,, nasser