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TUSB320: High leakage current when VDD is low and EN_N is high

Beginner
Intellectual 2221 points
Part Number: TUSB320

Hi Team,

On customer PCBA, the VDD and EN_N pin of TUSB320 is controlled by external device.  For power saving, customer is trying to disable TUSB320 by VDD is low and EN_N is high. However, the leakage current will be 1ms. I noticed the shutdown mode should 1.7uA when VDD is 4.5 V and EN_N is high. Not sure VDD will cause higher current for this. Kindly comment this symptom. 

  • 0
    TI__Guru 64326 points

    Hi,

    Are the external pull-ups to the open drain outputs of TUSB320 pulled up to the same power rail as TUSB320? Does customer see expected leakage current when VDD is high (within Recommended Operation Conditions)? What is seen when the external resistors are removed when VDD is low and EN_N is high?

  • 0 in reply to Malik Barton57
    TI__Intellectual 2221 points

    On customer's schematic - VDD is connected to other buck-boost IC to apply 3.3V, EN_N is connected to 200K pull-down resistor (default) and connected to one GPIO of other MCU.

    Actually, within recommended operation condition, the leakage current is normal, Not sure which external resistor you point. 

  • 0 in reply to Beginner
    TI__Guru 64326 points

    Hi,

    TUSB320 cannot limit the current from the pull-up resistors connected to it when VCC is low and EN_N is high. The external resistors I am reffering to are thepull-up resistor for the open drian outputs of TUSB320. This includes pins such as ID, INT_N/OUT3, SDA/OUT1, SCL/OUT2.

    Also please see this note from the device datasheet: "When VDD is off, the TUSB320 non-failsafe pins (VBUS_DET, ADDR, PORT, ID, OUT[3:1] pins) could back-drive the TUSB320 device if not handled properly. When necessary to pull these pins up, it is recommended to pullup PORT, ADDR, INT_N/OUT3, and ID to the device VDD supply. The VBUS_DET must be pulled up to VBUS through a 900-kΩ resistor."