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DS100DF410: RETIMER

Part Number: DS100DF410

Hi all

 

How are you? I hope good in these days…

 

I’m Shimon form RAD and we are encountering a problem with TI retimer p/n  DS100DF410SQ/NOPB in our product.

We have constructed the following testing setup : (lines inside Startix chip represent the data flow)

 

 

After the data flow for a time, we start to have CRC errors. The 1G generators generate real Ethernet packets (not PRBS.).

I have some question about retime in 1G operation :

  1. What is the recommended initialization of the retimer for 1G operation. (please state values for all applicable registers)

  2. Regarding CTLE in adaptation mode - When retimer set to 1G, the divider setting to 8 (is >2), then a fixed EQ setting from register 0x3a is used.

    Always , the default read from register 0x3 the value 0xa5 (default value of register 0x3a).

    Register 0x6F[7] is low (indicating not in adaptive mode) and we can’t change it to perform EQ adaptation. What is the reason ??? does  RETIMER can insert CTLE adaptation mode and how it can be done?

  3. Please advise what values of CTLE need used for 1G operation .

  4. Please elaborate on adaptation mode in related to 1G operation, we failed to find documentation in related to this topic.

Do you knowing to errata for 1G mode?

  • Hi Shimon,

    Can you please set reg 0x3A to 0x00 and re-run your test. Do you still see an issue? It is possible we could be over-equalizing with gain setting of 0xA5. After changing reg 0x3A to 0x00 pleae reset CDR or disconnect and reconnect the incoming signal to cause CDR reset. Please let us know your result.

    Regards,, Nasser

  • Hi,

    I responded to these items via direct email, but see below for historical tracking via E2E:

    1. What is the recommended initialization of the retimer for 1G operation. (please state values for all applicable registers)

      • By default the DS100DF410 is set to mode where its CDR automatically locks to 1.25Gbps input data

    2. Regarding CTLE in adaptation mode - When retimer set to 1G, the divider setting to 8 (is >2), then a fixed EQ setting from register 0x3a is used. Always , the default read from register 0x3 the value 0xa5 (default value of register 0x3a). Register 0x6F[7] is low (indicating not in adaptive mode) and we can’t change it to perform EQ adaptation. What is the reason ??? does  RETIMER can insert CTLE adaptation mode and how it can be done?

      • Correct, we don’t implement auto adaption for 1Gbps rate

      • The issue is that for this low data rate there is much less difference in applied boost between CTLE settings. Thus, attempting to auto adapt EQ at 1Gbps could result in inconsistent EQ auto adaption result.

      • For these links, my recommendation would be the following

        1. Set 0x3A = 0x00 for the SFP+ ingress retimer channels (i.e. retimer channels receiving electrical data from the SFP+ module)

        2. Keep 0x3A = 0xA5 for retimer channels receiving data from FPGA via the mid-plane connector

    3. Please advise what values of CTLE need used for 1G operation .

      • See my input to item 3 above

    4. Please elaborate on adaptation mode in related to 1G operation, we failed to find documentation in related to this topic.

      • Adaption is not implemented for 1Gbps data. Instead, CTLE boost value is implemented per channel register 0x3A

    5. Do you knowing to errata for 1G mode?

      • No errata identified

    Cordially,

    Rodrigo Natal

    HSSC Applications Engineer