Part Number: DS90UB913A-Q1
Below is the data link for our set up
megapixel sensor -> fpga -> DS90UB913 serializer -> DS90UB934 deserializer -> TDA2x
The sensor runs at a different clock than the serializer. What is the mechanism in the serializer for the fpga to possibly exercise flow control of the sensor data?
Can we use the HSYNC and VSYNC signals in the serializer for flow control? If yes, are there timing diagrams to demonstrate the use of HSYNC and VSYNC for this purpose?
Training on FPD-Link Serializer Deserializer devices and system: https://training.ti.com/fpd-link-learning-center
More information on IVI or ADAS FPD-Link products: http://www.ti.com/interface/fpd-link-serdes/overview.html
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In reply to Palaniappan Manickam:
The H and V sync do not control the video data coming out of the serializer. If the H and V sync are missing the video data will still be transmitted on the serial FPD link. See the HSYNC and VSYNC pin descriptions and section 8.1 of the datasheet for restrictions on H and V sync.
In reply to Michael Stout:
In reply to eleceng88_canada:
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