DS90UB913/914 clocking clarification

Hi Carl,

The 10-bit and 12-bit ratios for external oscillator mode are described on page 38 of the DS90UB913/4 datasheet. The description reads:

“For example, if the external oscillator frequency is 48MHz in the 10–bit mode, the pixel clock frequency of the imager needs to be twice of the external oscillator frequency, i.e. 96MHz. If the external oscillator frequency is 48MHz in the 12-bit high frequency mode, the pixel clock frequency of the imager needs to be 1.5 times of the external oscillator frequency, i.e. 72MHz.

Using 48MHz oscillator datasheet example, the 913/914 modes should correspond the following:

The external oscillator is intended for applications where the video source has excessive jitter beyond the 913 jitter tolerance. We’ve had customers experience jitter issues in the past and therefore implemented this mode. It’s difficult to determine if external oscillator mode is required in your application without analyzing the jitter in detail.

Dac Tran

SVA APPS

Thanks Dac,

The fact that the datasheet only specifically calls out a fixed pixel clock to oscillator ratio for two of the three modes left me with a small amount of hope that the 12-bit LF mode was somehow less restrictive.  No such luck, it appears.  We need a 42 MHz pixel clock which doesn't give me a good option except to use the imager as the source.  We'll have to analyze the jitter on it's PCLK.

-Carl

Hi, Dac.

Recently, I come across the similar question as Carl's. I'm confused so much. My application is for camera image sensor, i.e. 913 on remote side and 914 on local side of ECU. My image sensor supplies 8-bit parallel data of BT.656 without H/V sync since H/V sync is embedded in parallel data already.

Q1: As P.38 of datasheet says, external OSC(e.g. frequency is 48MHz) feeds GPO3 of 913. After divide-by-2 in 913, GPO2 could supply 24MHz as sensor's clock input. So, sensor's PCLK output should also be 24MHz as PCLK's input of 913. For example, the sensor I'm using does so. Is there any problem with my understanding?

Q2: Then, PCLK of 24MHz will be fed to 913 and divided by 1(12b-LF)/1.5(12b-HF)/2(10b) inside 913. Does this dividing(by 1/1.5/2) block means the same thing as dividing-by-2 block prior to GPO2 output?

Q3: As P.40 of datasheet says, 914 multiplies the recovered serial clock to generate PCLK by 1(12b-LF)/1.5(12b-HF)/2(10b). Up to now, PCLK of 24MHz should be output from PCLK pin of 914. Is this right?

Q4: If the previous is OK, my confusion comes, where can PCLK of 96/72/48 MHz in the table below be found in the circuit? PCLK pin of 913 or 914? Or anywhere else inside 913 or 914? Or the PCLK output from my image sensor? Or, at first, I should decide external OSC of 913 by image sensor OSC? In fact, my image sensor outputs 8-bit parallel data with 27MHz clock and requires 27MHz OSC. Since ratio in the table below should be 2, so I have to feed 13.5MHz external OSC to GPO3 of 913, and then GPO2 will output 6.75MHz for sensor unit. And prior to input to sensor clock, I have to multiply 6.75MHz by 4 to get 27MHz required. How can I deal with this trouble?

Q5: BTW, I need to use GPI function for motion detection(status bit reported by image sensor) on 913 side. Since 913 has no GPI function pin, can I use H/V Sync pin or other video data pins like DIN[1] or DIN[0] as GPI instead since I only use 8-bit video data? And on the 914 side, I connect the corresponding pin to ECU for use. Does this idea work? If not, why not? If yes, is there any disadvantage or side effect? In my opinion, motion detection signal will be sampled on PCLK rising edge. Maybe this results in some precision error. But is this error serious enough to be not able to work correctly at all? And will reliability of video data get involved with this pseudo GPI?

Thanks Dac for your help.
By sphinxing.