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DS90UB928Q GPIO0 & GPIO1 not functioning, GPIO2 & GPIO3 are O.K

Other Parts Discussed in Thread: DS90UB928Q, DS90UH928Q

Hi,

I am currently de-bugging a HMI H/W design, for which I have come across an issue which I am hoping somebody can offer me assistance.

An overview of my set-up is as follows: -

I am operating a SerDes set-up in display mode utilising a DS90UB925Q (Ser) interfacing to a H/W selectable DS90UB926Q or DS90UB928Q (Des) which is selected by removing the series coupling capacitors from the FPD-Link-III rails and driving the PDB pin low on the device which is not in operation. The SerDes are set-up using the MODE-SEL pins (#2) for 18-Bit mode to utilise the 4 x GPIO pins, and the GPIO pins are configured over I2C to set-up each device and their associated registers.

The problem I am experiencing is outlined as follows:-

The DS90UB926Q device functions as required, setting up GPIO (0-3); however the GPIO (0-3) will not set-up as required for the DS90UB928Q device. This issue is that GPIO (0-1) will not function correctly (Ser = Inputs, Des Outputs) even though the register addresses are the same as the DS90UB926Q. I can independently drive each GPIO (0-3) as an O/P (High / Low) for both the DS90UB925Q (Ser) and DS90UB928Q (Des) via the I2C registers which indicates the devices GPIO are functioning; however once I configure the GPIO as I require them GPIO (0-1) as Inputs at Ser, the Des fails to respond GPIO (2-3) functions as required. It looks to me as though there is some issue with GPIO (0-1) perhaps a register that I am unaware of which needs configuring?

Please can somebody help explain what is happening here, and how I go about resolving the issue?

I have included the full list if of I2C commands I send to the three FPD-Link-III devices in case I am missing something fundamental: -

 I2C Addresses: -

 DS90UB925Q (Ser): - 0x18 8'b           0x0C 7'b

DS90UB926Q (Des Par): -      0x58 8'b           0x2C 7'b

DS90UB928Q (Des LVDS): -  0x66 8'b           0x33 7'b

 DS90UB925Q (Ser): -   0x18 8'b: -

1.      Set 'Configuration [0]' Register (ADD = 0x03) to 0xFA (1111 1010)

  • Bit7 = 1, Back Channel CRC Check Enabled
  • Bit6 = 1, Reserved
  • Bit5 = 1, Automatically Acknowledge I2C Remote Write (Test With disabled)
  • Bit4 = 1, Filter Enable (HS, VS, DE) (Check with current LCD timings)

  • Bit3 = 1, I2C Pass Through Enabled
  • Bit2 = 0, Reserved
  • Bit1 = 1, Enable auto-switch over to internal OSC in the absence of PCLK (Allows I2C to function with loss of video PCLK)
  • Bit 0 = 0, Parallel Interface Data is strobed on the Falling Clock Edge

2.      Set 'Slave ID' Register for AR1021 (ADD = 0x07) to 0x9A (1001 1010)

3.      Set 'Slave Alias' Register for AR1021 (ADD = 0x08) to 0x9A (1001 1010)

 4.      Set 'Data Path Control' Register (ADD = 0x12) to 0x05 (0000 0101)

  • Bit7 = 0, Reserved
  • Bit6 = 0, Reserved
  • Bit5 = 0, DE is positive (active high, idle low)
  • Bit4 = 0, Repeater pass through I2S from video pins

  • Bit3 = 0, Set I2S Channel B Enable from MODE_SEL pin (Enabled with 294k & 40.2k)
  • Bit2 = 1, Select 18-bit video mode
  • Bit1 = 0, Enable I2S Data Island Transport
  • Bit 0 = 1, I2S Channel B ON; 18-bit RGB mode with I2S_DB enabled

5.      Set 'GPIO0 Configuration Register' (ADD = 0x0D) to 0xA3 (1010 0011) (Backlight PWM, Input)

  • Bit7-4 = A, Revision ID (Factory Set)

  • Bit3 = 0, GPIO0 Output value set to '0' when set to O/P & function enabled and remote GPIO control is disabled
  • Bit2 = 0, GPIO0 control disabled from Remote Deserializer   
  • Bit1 = 1, GPIO0 direction set to Input
  • Bit 0 = 1, GPIO0 enable

6.      Set 'GPIO2 & GPIO1' Configuration Register' (ADD = 0x0E) to 0x53 (0101 0011) (Touch Screen Interrupt, Buzzer respectively)

  • Bit7 = 0, GPIO2 Output value set to '0' when set to O/P & function enabled and remote GPIO control is disabled
  • Bit6 = 1, GPIO2 control enabled from Remote Deserializer  
  • Bit5 = 0, GPIO2 direction set to Output
  • Bit4 = 1, GPIO2 enable

  • Bit3 = 0, GPIO1 Output value set to '0' when set to O/P & function enabled and remote GPIO control is disabled
  • Bit2 = 0, GPIO1 control disabled from Remote Deserializer  
  • Bit1 = 1, GPIO1 direction set to Input
  • Bit 0 = 1, GPIO1 enable

7.      Set 'GPIO3 & GPO_REG4' Configuration Register' (ADD = 0x0F) to 0x03 (0000 0011) (Spare)

********** Set-up not required for test purposes only leave at default 0x00 *************

  • Bit7 = 0, GPO_REG4 Output value set to '0' when GPO function is enabled
  • Bit6 = 0, Reserved
  • Bit5 = 0, Reserved
  • Bit4 = 0, GPO_REG4 Enable normal operation (Disabled)

  • Bit3 = 0, GPIO3 Output value set to '0' when set to O/P & function enabled and remote GPIO control is disabled
  • Bit2 = 0, GPIO3 control disabled from Remote Deserializer   
  • Bit1 = 1, GPIO3 direction set to Input
  • Bit 0 = 1, GPIO3 enable

Choose one of the two below, dependant on which Deserializer is being used: -

DS90UB926Q (Des): -   0x58 8'b: -

1.      Set 'Configuration [1]' Register (ADD = 0x03) to 0xF8 (1111 1000)

  • Bit 3 = 1, I2C Pass-Through Enabled

2.      Set 'GPIO0 Configuration Register' (ADD = 0x1D) to 0xA5 (1010 0101) (Backlight PWM, Output)

  • Bit7-4 = A, Revision ID (Factory Set)

  • Bit3 = 0, GPIO0 Output value set to '0' when set to O/P & function enabled and remote GPIO control is disabled
  • Bit2 = 1, GPIO0 control enabled from Remote Serializer  
  • Bit1 = 0, GPIO0 direction set to Output
  • Bit0 = 1, GPIO0 enable

3.      Set 'GPIO2 & GPIO1' Configuration Register' (ADD = 0x1E) to 0x35 (0011 0101) (Touch Screen Interrupt, Buzzer respectively)

  • Bit7 = 0, GPIO2 Output value set to '0' when set to O/P & function enabled and remote GPIO control is disabled
  • Bit6 = 0, GPIO2 control disabled from Remote Serializer  
  • Bit5 = 1, GPIO2 direction set to Input
  • Bit4 = 1, GPIO2 enable

  • Bit3 = 0, GPIO1 Output value set to '0' when set to O/P & function enabled and remote GPIO control is disabled
  • Bit2 = 1, GPIO1 control enabled from Remote Serializer  
  • Bit1 = 0, GPIO1 direction set to Output
  • Bit 0 = 1, GPIO1 enable

4.      Set 'GPIO3 & GPO_REG4' Configuration Register' (ADD = 0x1F) to 0x05 (0000 0101) (Spare)

********** Set-up not required for test purposes only leave at default 0x00 *************

  • Bit7 = 0, GPO_REG4 Output value set to '0' when GPO function is enabled
  • Bit6 = 0, Reserved
  • Bit5 = 0, Reserved
  • Bit4 = 0, GPO_REG4 Enable normal operation (Disabled)

  • Bit3 = 0, GPIO3 Output value set to '0' when set to O/P & function enabled and remote GPIO control is disabled
  • Bit2 = 1, GPIO3 control enabled from Remote Serializer  
  • Bit1 = 0, GPIO3 direction set to Output
  • Bit 0 = 1, GPIO3 enable

 DS90UB928Q (Des): -   0x66 8'b: -

1.      Set 'Configuration [1]' Register (ADD = 0x03) to 0xF8 (1111 1000)

  • Bit 3 = 1, I2C Pass-Through Enabled

2.      Set 'GPIO0 Configuration Register' (ADD = 0x1D) to 0x25 (0010 0101) (Backlight PWM, Output)

  • Bit7-4 = A, Revision ID (Factory Set)

  • Bit3 = 0, GPIO0 Output value set to '0' when set to O/P & function enabled and remote GPIO control is disabled
  • Bit2 = 1, GPIO0 control enabled from Remote Serializer  
  • Bit1 = 0, GPIO0 direction set to Output
  • Bit0 = 1, GPIO0 enable

4.      Set 'GPIO2 & GPIO1' Configuration Register' (ADD = 0x1E) to 0x35 (0011 0101) (Touch Screen Interrupt, Buzzer respectively)

  • Bit7 = 0, GPIO2 Output value set to '0' when set to O/P & function enabled and remote GPIO control is disabled
  • Bit6 = 0, GPIO2 control disabled from Remote Serializer  
  • Bit5 = 1, GPIO2 direction set to Input
  • Bit4 = 1, GPIO2 enable

  • Bit3 = 0, GPIO1 Output value set to '0' when set to O/P & function enabled and remote GPIO control is disabled
  • Bit2 = 1, GPIO1 control enabled from Remote Serializer  
  • Bit1 = 0, GPIO1 direction set to Output
  • Bit 0 = 1, GPIO1 enable

5.      Set 'GPIO3' Configuration Register' (ADD = 0x1F) to 0x05 (0000 0101) (Spare)

********** Set-up not required for test purposes only leave at default 0x00 *************

  • Bit7-4 = 0,Reserved

  • Bit3 = 0, GPIO3 Output value set to '0' when set to O/P & function enabled and remote GPIO control is disabled
  • Bit2 = 1, GPIO3 control enabled from Remote Serializer  
  • Bit1 = 0, GPIO3 direction set to Output
  • Bit 0 = 1, GPIO3 enable

 If you require anymore information please let me know

Thanks Lee Smith

  • Hi Anthony,

    We are looking into this, someone will respond to this post soon.

    Regards,

    TK Chin

     

  • Hi Lee, 

    I just recently verified this inter-operation issue.

    There is a GPIO errata when using DS90Ux928 DES with the DS90Ux925 SER
    Note: This errata is not relevant when using the DS90Ux928 DES with DS90Ux927 SER
    The errata listed below describe known cases where the DS90UH928Q device performs
    differently than specified in the datasheet description. Recommended workarounds are
    provided where applicable.
    1. GPIO0 (pin 14)
    Description: 925 GPIO0 (pin25), when programmed as an input, does not map
    out on 928 GPO0 (pin 14), when programmed as an output; this is
    the SER to DES direction.
    Note: When 928 GPI0 is programmed as an input and 925 GPO0 is
    programmed as an output, 925 GPO0 is mapped correctly; this is the
    DES to SER direction
    Work-around:
    Option 1:
    Use 925 GPO_REG4 (pin 43), this will map to 928 GPIO0 (pin 14)
    a) Set DS90Ux925 in 18-bit mode by mode pin = 1 or by register
    0x12[2]=1
    b) Set DS90Ux928 register 0x1D[0]=1 and 0x1D[2]=1; this will enable
    GPIO0 as output
    c) Set DS90Ux925 register 0x0F[0]=1 and 0x0F[1]=1; this will enable
    GPO_REG4 as input
    Option 2:
    If only a static signal is needed, use 928 register 0x0D[3] (GPIO0
    OUTPUT VALUE). When 0x0D[3]=1; GPIO0 will be a static HIGH.
    When 0x0D[3]=0; GPIO0 will be a static LOW. This register can be
    written remotely from 925 or locally from 928
    Option 3:
    Use another available GPIO.
    Status: Datasheet will be modified to correctly reflect this behavior.
    2. GPIO1 (pin 26)
    Description: 925 GPIO1 (pin26), when programmed as an input, does not map
    out on 928 GPIO1 (pin 13), when programmed as an output; this is
    the SER to DES direction.
    Note: When 928 GPIO1 is programmed as an input and 925 GPIO1 is
    programmed as an output, 925 GPIO1 is mapped correctly; this is the
    DES to SER direction
    Work-around:
    Option 1:
    If I2S_DB ((pin 44) is not being used, then:
    Use 925 GPO_REG5 (pin 44), this will map to 928 GPIO1 (pin 13)
    a) Set DS90Ux925 in 18-bit mode by mode pin = 1 or by register
    0x12[2]=1
    Errata Rev 1_1 Texas Instruments Confidential 8/21/2013
    b) Set DS90Ux928 register 0x1E[0]=1 and 0x1E[2]=1; this will enable
    GPIO1 as output
    c) Set DS90Ux925 register 0x10[0]=1 and 0x10[1]=1; this will enable
    GPO_REG5 as input
    Option 2:
    If only a static signal is needed, use 928 register 0x0E[3] (GPIO1
    OUTPUT VALUE). When 0x0E[3]=1; GPIO1 will be a static HIGH.
    When 0x0E[3]=0; GPIO1 will be a static LOW. This register can be
    written remotely from 925 or locally from 928
    Option 3:
    Use another available GPIO.
    Status: Datasheet will be modified to correctly reflect this behavior.

  • Hi Darryl,

    Thanks for the prompt response,

    I must express my disappointment at TI for what appears to be a fundamental problem, which directly affects the functionailty of my prototype design builds, which sould be operational following the TI datasheets.  

    So I have a clear understanding of the problem I found please can you provide clarification on the below points: -

    1)     Is this the first time that this issue has been known of / reported ?

    2)     Is the problem associated with the actual design of the 928 device, or the datasheet that supports it ?

    3)     If this error is related to the 928 device itself, do you know if / when a design fix will be done ?

    4)     When will the updated datasheet (incorporating errata) for the 928 device be available ?

    5)     Were the 925 GPO_REG4 and 925 GPO_REG5 pins originally designed to be the mapped to GPIO0 & GPIO1 respectively on the 928 device ?

    6)     How will the mapping of the 925 GPO_REG4 and 925 GPO_REG5 pins affect the 926 device ?

    I have had a look through your errata suggestions, unfortunately none of these are a straight forward fix for my current design H/W for the following reasons: -

    1)     GPO_REG pins (11,12,13,44,43) are not tracked on the PCB for the Ser925 and as I use the WQFN package re-work is difficult.

    2)     My current H/W requires GPIO0 & GPIO1 to be Input (Ser) to Output (Des) on 928. One option is to change the H/W to use GPIO2 & GPIO3 and use GPIO0 & GPIO1 for Output (Ser) to Input (Des), or use as an I2C controlled O/P at the 928; however this will involve modifying my PCB's

    I had thouroughly tested the 925 & 926 devices using the evaultion kits before producing my prototype boards; however I did not perfrom this task with the 928 which I would have discovered this problem.I will contact our local TI distributor to see if I can obatain a 928 Eval board so I can verify your suggestions and see which is the best option for me.

    I would ideally like to use the 925 (Ser) to 928 (Des) paired devices as this is optimum for my design.

    Please can you advise on the above queries ?

    Thanks

    Lee Smith

  • Hi,

    I am currently looking to design the 928 (Des) device interfacing to the 925 (Ser) into our new product range; however before I feel comfortable in doing this I need a response so I have a clear understanding of the questions placed in my previous post.

    Please can somebody from TI please answer my questions on the previous post ? I have re-iterated my questions below: -

    So I have a clear understanding of the problem I found please can you provide clarification on the below points: -

     

    1)     Is the problem associated with the actual design of the 928 device, or the datasheet that supports it ?

    a)     If this error is related to the 928 device itself, do you know if / when a design fix will be done ?

    3)     When will the updated datasheet (incorporating errata) for the 928 device be available ?

    4)     Were the 925 GPO_REG4 and 925 GPO_REG5 pins originally designed to be the mapped to GPIO0 & GPIO1 respectively on the 928 device ?

    5)     How will the mapping of the 925 GPO_REG4 and 925 GPO_REG5 pins affect the 926 device ?

     

    I hope to hear a speedy response from TI before this starts to impact on our design timescales.

    Thanks

    Lee Smith

     

  • Hi Daryl,

    I have just tried the two suggestions you made (Re-routing 925 GPO_REG4 (pin 43) and Use 925 GPO_REG5 (pin 44) as the inputs for GPIO0 & GPIO1 respectively and setting the registers. This does not appear to work, please can you advise that this has been confirmed to work at TI ? If any documentation available yet which will help with this Errata ?

    Thanks Lee 

  • Hello Lee,

    1) The problem is associated with the 928 device, not the datasheet.

    a) The 928 will not be fixed but a derivative of this product is  being designed currently.

    3) The datasheet is in queue to be updated.

    4) No, the 925 GPO_REG4 and 925 GPO_REG5 were not originally designed to be mapped to 928 GPIO0 and 928 GPIO1

    5) The mapping of the 925 GPO_REG4 and 925 GPO_REG5 does not affect the mapping to the 926 device.  BTW, the nomenclature used GPO_REGx indicates this is a local register only

    Regards,

    Darryl

  • Hi Lee,

    Yes, this has been verified at TI awhile ago, I can setup here and double check.

    This is the errata in text:

    GPIO errata when using DS90Ux928 DES with the DS90Ux925 SER
    Note: This errata is not relevant when using the DS90Ux928 DES with DS90Ux927 SER
    The errata listed below describe known cases where the DS90UH928Q device performs differently than specified in the datasheet description. Recommended workarounds are provided where applicable.
    1. GPIO0 (pin 14)
    Description: 925 GPIO0 (pin25), when programmed as an input, does not map out on 928 GPO0 (pin 14), when programmed as an output; this is the SER to DES direction.
    Note: When 928 GPI0 is programmed as an input and 925 GPO0 is programmed as an output, 925 GPO0 is mapped correctly; this is the DES to SER direction
    Work-around:
    Option 1:
    Use 925 GPO_REG4 (pin 43), this will map to 928 GPIO0 (pin 14)
    a) Set DS90Ux925 in 18-bit mode by mode pin = 1 or by register 0x12[2]=1
    b) Set DS90Ux928 register 0x1D[0]=1 and 0x1D[2]=1; this will enable GPIO0 as output
    c) Set DS90Ux925 register 0x0F[0]=1 and 0x0F[1]=1; this will enable GPO_REG4 as input
    Option 2:
    If only a static signal is needed, use 928 register 0x0D[3] (GPIO0
    OUTPUT VALUE). When 0x0D[3]=1; GPIO0 will be a static HIGH.
    When 0x0D[3]=0; GPIO0 will be a static LOW. This register can be written remotely from 925 or locally from 928
    Option 3:
    Use another available GPIO.
    Status: Datasheet will be modified to correctly reflect this behavior.
    2. GPIO1 (pin 26)
    Description: 925 GPIO1 (pin26), when programmed as an input, does not map out on 928 GPIO1 (pin 13), when programmed as an output; this is the SER to DES direction.
    Note: When 928 GPIO1 is programmed as an input and 925 GPIO1 is programmed as an output, 925 GPIO1 is mapped correctly; this is the DES to SER direction
    Work-around:
    Option 1:
    If I2S_DB ((pin 44) is not being used, then:
    Use 925 GPO_REG5 (pin 44), this will map to 928 GPIO1 (pin 13)
    a) Set DS90Ux925 in 18-bit mode by mode pin = 1 or by register 0x12[2]=1
    b) Set DS90Ux928 register 0x1E[0]=1 and 0x1E[2]=1; this will enable
    GPIO1 as output
    c) Set DS90Ux925 register 0x10[0]=1 and 0x10[1]=1; this will enable GPO_REG5 as input
    Option 2:
    If only a static signal is needed, use 928 register 0x0E[3] (GPIO1 OUTPUT VALUE). When 0x0E[3]=1; GPIO1 will be a static HIGH.
    When 0x0E[3]=0; GPIO1 will be a static LOW. This register can be written remotely from 925 or locally from 928
    Option 3:
    Use another available GPIO.

    Best regards,
    Darryl
  • Hi Darryl,

    Thanks for re-confirming this.

    Yes if somebody could re-confirm this setup functions that would be great as I couldn't get this working myself yesterday. I'll try it again today.

    Can you confirm something for me: -

    Is the workaround mapping of 925 GPO_REG4 (pin 43) to 928 GPIO0 (pin 14) uni-directional only (Ser = Input, Des = Output) ? Or is it possible to use the same 925 GPO_REG4 (pin 43) for output also.

    Same question will also apply to 925 GPO_REG5 (pin 44) to 928 GPIO1 (pin 13)

    If not then this will compromise overall flexibility of GPIO (0:1)  

    Thanks Lee

     

  • Hi Darryl,

    Having looked at the DS90UB925Q datasheet (SNLS407C –APRIL 2012–REVISED APRIL 2013) and referencing to your previous instruction for GPIO 0: -

    "c) Set DS90Ux925 register 0x0F[0]=1 and 0x0F[1]=1; this will enable GPO_REG4 as input"

    Register 0x0F bit positions [0:3] relate to GPIO3, not GPO_REG4 as this uses bit positions [4&7], [5:6] are reserved. Is this an error, and is this why the suggested work-around isn't working ?