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DS80PCI800 / Tpor in SMBus master mode

Other Parts Discussed in Thread: DS80PCI800

Hi,

Our customer is using DS80PCI800 in SMBus master mode.

Tpor-max described in the data sheet is 500ms.

However,I think the PCIe device has to start up within 100ms.

In SMBus master mode, Do we have to secure 500ms after power on?

Best Regards,

Kato

  • Hi Kato-san,

    The tPOR 500 ms maximum spec is the maximum amount of time that can elapse before the device is able to respond to SMBus communication and transactions. This applies to slave and master SMBus mode. 

    If your customer chooses to use master mode, I agree with you and would recommend that they consider allowing ~500 ms delay after a power-on reset event. This will help to ensure that the SMBus line is active and that all the desired EEPROM settings can load into the device successfully.

    Thanks,

    Michael

  • Michael - san,

    Thank you for the reply.

    According to our customer evaluation,

    the signal of ALL_DONE is transited from high level to low level no later than 30ms

    after the power is turned on.

    However,do we have to wait 500ms to load desired EEPROM setting successfuly?

    Best Regards,

    kato

  • Hi Kato-san,

    Thanks for this observation. I looked more into the origination of the spec and found information about where this 500 ms requirement is from (http://smbus.org/specs/smbus20.pdf).

    In Section 3.1.4.2, the SMBus specification requires a device is live on the SMBus line within 500 ms.

    The 500ms tPOR specification is the maximum amount of wait time you can have to guarantee that the device is in an operational state in accordance with the SMBus 2.0 specification. However, the device can certainly be operational much sooner than 500 ms. If the typical device in your use case only requires 30 ms to load EEPROM successfully after power-up, the customer should not need to wait as long as 500 ms. However, programming at least some delay may still be useful to ensure enough margin for the EEPROM to load successfully.

    Thanks,

    Michael

  • Hi,

    The datasheet describes Tpor as "Time in which a device must be operational after power-on reset". Does this power-on reset occur directly after power-up or after the assertion of the READ_EN# pin? In other words, is the Tpor specification applicable from the device power-on or from the assertion of the READ_EN# pin?

    Thank you,

    Cedrick
  • Hi Cedrick,

    The 500 ms spec is referenced from the SMBus specification, and we anticipate that our devices become active much faster than 500 ms. According to the specification of the power-on reset, it occurs once the SMBus SDA/SCL lines go active after a power-on event (the lines are pulled high). Therefore, I would begin counting the time after the device has been powered-on or after the device #PRSNT pin is pulled low. This spec should not correspond to the READ_EN# pin. The READ_EN# pin will give control of the bus to the DS80PCI800 so that one device at a time will load its settings from the external EEPROM.

    I have tested the EEPROM load time in the lab with one of our DS80PCI800 ICs and an Atmel AT24C02C EEPROM, and the load time I measured is approximately 1.6 ms:

    Thanks,

    Michael

  • Hi Cedrick,

    As an additional statement, I have confirmed with our design team recently that you can expect the repeater device to be in an SMBus operational state within 30 ms of a power-on reset event. This will be well under the 500 ms max spec that we pulled from the SMBus spec tables.

    Michael