There is "Power Up Requirements and PDB PIN" for datasheet of DS90UH925Q.
There, the following contents are written.
"The VDDs (VDD33 and VDDIO) supply ramp should be faster than 1.5 ms with a monotonic rise. ....."
Why must it rise earlier than 1.5ms.
I think that PDB should just be set to "High" after VDD and VDDIO rise.