• State Resolved
  • Locked Locked
  • Replies 2 replies
  • Subscribers 31 subscribers
  • Views 868 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

LMH0031 No Video Clock (VCLK)

Mike Dawson
Prodigy 130 points
Other Parts Discussed in Thread: LMH0031

Hello,

We have designed an LMH0031 on to a card and with a good quality SDi signal applied to the inputs there is no data output and no VCLK. The circuit is wired to use the internal 27MHz oscillator, which has been enabled and is working correctly. After reset the ACLK pin is toggled three times, as required by the datasheet. Also, tried using the internal test pattern, colour bars, but still no VCLK.

The +3V3 is used to power a +2V5 LDO, so +3V3 should be available before the core +2V5 is applied.


Attached is the schematic of the LMH0031. Please note the schematic symbol has been drawn in a mirrored format, but the PCB footprint is correct.

  • 0
    Prodigy 130 points

    Further investigation has shown that the PLL is not in lock, which explains why VCLK is not available. The direction control for VCLK is set to an output.


    Any ideas why the PLL is not in lock?

  • 0 in reply to Mike Dawson
    Prodigy 130 points

    For completeness I am posting this, as I have found the answer.

    I found that the LMH0031 would not work from a crystal, i.e. using the internal 27MHz oscillator with an external crystal and phase shift capacitors. It seems that a 27MHz external clock needs to be applied to the device during reset for the PLL to run correctly, as during reset the 27MHz clock is set to external. VCLK is no running and the PLL is in lock - at last!