[ DS90UB928 ] GPIO Status During Transition

Kenichiro

Mastermind 9165 points

[ DS90UB928 ] GPIO Status During Transition

Hi,

Can you please let me know the status of GPIO[1:0] under following conditions?

1: During VDD ramp up

2: After VDD reaching to range, before PDB, OEN and OSS_SEL are ramped up.

These GPIO ports are connected to other devices, it’s preferred to keep low during transitions above.

Thanks for your support in advance.

Regards,

Ken

over 9 years ago

0 Kenichiro over 9 years ago

Mastermind 9165 points

Hi,

It's really appreciated, if someone can support this item.

If it's not clear, feel free to communicate with me.

Thanks,

Ken

0 Jason Blackman over 9 years ago in reply to Kenichiro

TI__Genius 14015 points

Hi Ken,

I apologize for the delay. The GPIO pins will be high impedance until they are enabled. This includes during power up.

Thanks,
Jason

0 Kenichiro over 9 years ago in reply to Jason Blackman

Mastermind 9165 points

Hi Jason,

Sorry for my late reply.

Let me double check, you mean, even if some control pins are set (ex. OEN and OSS_SEL), GPIO pins stays in high impedance state, until GPIO is enabled by register. Correct?

I'm little bit confused, from table above, this says slightly differnt way.

Thanks,

Ken

0 Jason Blackman over 9 years ago in reply to Kenichiro

TI__Genius 14015 points

You are correct. The table is referring to GPIOs when enabled as outputs. If they haven't been enabled yet, then they are high impedance.

Thanks,
Jason

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[ DS90UB928 ] GPIO Status During Transition

[ DS90UB928 ] GPIO Status During Transition