This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DS90CF384 LVDS to Parallel Bit Mapping?

Other Parts Discussed in Thread: DS90CF384, DS90CF386

Hello,

From my understanding the each of the LVDS pairs that connects to this IC carries a total of 7 bits. With 4 LVDS pairs a total of 28 bits get trasmitted and deserialzed to the RXOUT0 though RXOUT27 ouputs.

What I cannot figure out is how each of the bits from the 4 LVDS channels maps to RXOUT0 though RXOUT27 can somebody please let me know this mapping. Is it a standard LVDS single bus JEIDA or VESA 24bpp data packaging?

Thanks;

Leo 

  • Hi Leo,

    That is correct. Each of the LVDS pairs contains 7 bits of information corresponding to each individual LVCMOS bit.To look at how the LVDS channels map to the Tx and Rx outputs, please look at Figure 14 on the DS90CF384 datasheet (there is a typo in the labeling. It should say "28 Parallel TTL Data Inputs Mapped to LVDS Outputs":

    Therefore, in the Rx, each bit's information will be mapped from the corresponding LVDS position. For example, RxOUT5 information will be taken from the 2nd bit in the TxOUT3+/-'s sequence.

    To convert this over in terms of RGB bit information, please refer to the following app note:

    http://www.ti.com/lit/an/snla014/snla014.pdf

    Table 1 of the app note shows that typically in design, the Tx/Rx mapping follows the standard convention of LSBs placed on TxOUT3+/- LVDS pair, as this allows convenience to use 24-bit or 18-bit color resolution. Ultimately, what matters is the way you map your outputs in accordance to the way they will arrive per Figure 14 (above).

    Thanks,

    Michael

  • Another question: In the datasheet it does not state the current draw individually for the following supply pins: VCC, LVDSVCC and PLLVCC. Are these know?

  • Hello Leo,

    In the lab, we do have a DS90CF386 device (a newer, pin-compatible device with higher speed and lower power consumption) that we tested for current draw, and this device pulled 40.8 mA with an 80 MHz clock and 20 MHz signal. This is about 135 mW, which falls below the 142 mW (typ) at 85 MHz.

    Since the measured 40.8 mA is close to the expected 43.0 mA (142 mW/3.3 V) in the DS90CF386, we would expect that a similar calculation for the DS90CF384 is a good estimate to determine the total current consumption of the part. From the datasheet we can infer that the total current draw of the device is approximately 76 mA under the worst case conditions. (<250 mW (typ) power consumption with 3.3 V supply). The current draw of each of these pins individually is not known as this information is not tested during production by ATE.

    Best,

    Michael

    High Speed Datapath Solutions

    Analog Factory Applications 

  • Michael,

    I did not need to know the power for the whole device. I would like to know the power individually between the the following pins VCC, LVDSVCC and PLLVCC.

    Thanks;

    Leo

  • Hello Leo,

    We have tested the DS90CF386 on our Eval Board for the current at each of these pins individually by desoldering the resistors that connect each of these pins to the power supply and measuring the current across the original resistor pads with an ammeter. The device was tested with a 65 MHz clock and a 16.2 MHz signal.

    The current into each of the pins was as follows:

    Pin

    Current

    VCC

    19.07 mA

    LVDSVCC

    9.47 mA

    PLLVCC

    9.77 mA

    As the DS90CF386 is similar to the DS90CF384, we correlate the relationship of their respective total currents to derive approximately what we expect for the three individual VCC pins of the DS90CF384.

    Pin

    Current

    VCC

    37.9 mA

    LVDSVCC

    18.8 mA

    PLLVCC

    19.4 mA

    Best,

    Michael

    High Speed Datapath Solutions

    Analog Factory Applications

  • Michael,


    Thanks for the info.


    Regards;

    Leo