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SN65LVCP114 SFI interface

Other Parts Discussed in Thread: SN65LVCP114

Greetings E2E.


Does the SN65LVCP114 work with a 10G SFI interface?

thanks

Madhuri

  • Hi Madhuri,


    The SN65LVCP114 can support 10G SFI interfaces but keep in mind that this is an equalizer with a built in 10G MUX. Its optimal performance comes when there is some ISI present before its input. The reason that I mention this is because SFI links are typically low loss in nature so if there is not some ISI in front of the equalizer the output eye can become distorted due to over equalization.

  • Thank you Michael. Can you please recommend how to introduce ISI before the SN65LVCP114?

  • Hi Madhuri,


    ISI introduced onto a signal through a channel. The channel is the copper link the will carry the signal from the SFP+ connector to the input/output of the receiving device. Typically this is a very short link because HS signals are susceptible to channel impairments. So the way to introduce more ISI would be to extend the length of the channel.

  • Hi Michael,


    Thanks for your answer. In this case, the SFI+ signal is coming out of SFP+ or QSFP+ transceivers. So, can I use this chip in between the SFP+/QSFP+ to the PHY? There is little control on channel length. Do i still need ISI incerement on SFP+/QSFP+ side?

    regards

    Madhuri

  • HI Madhuri,


    You can use this IC between PHY and SFP+/QSP+ as it will pass your signals unimpeded. The issue comes from placing an equalizer into a short link with little to no ISI. The SN65LVCP114 does have ~1.3dB of gain that can not be turned off which may cause the output eye in a short link to look distorted due to over equalization.

    To safe guard against this I recommend that during layout the traces going from the SFP+/QSFP+ module be tuned to include some extra loss. The other way to solve this problem is through the PHY itself. Some physical layer device include input attenuators as part of their analog stage allowing the system designer to induce some amount of loss on die. Not all PHYs include this type of feature but you can check with your PHY vendor to see if this is an option.

  • HI Michael,

    We ran into this problem right now. We have design that use this SN65LVCP114 back to back and to SFP+ on C port. We shall the eye got distorted. The length from this device is 3" to the SFP and about 2.5" between the SN65LVCP114.
    We saw very bad distorted eye out. See attach file.
    Will adding the trace length (loss) really solve this problem?
    If so, what is the minimum trace to get this to work?

    Can you please advise as we are in a very critical path?

    Thank you.
  • Hi Randy,

    Could you please provide eye diagram?

    Regards