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DS125BR401A EEPROM mode mapping with SMbus Register

                 We find SMMus 0x19 register (table 12) could not mapping to table 9 EEPROM Register Map as below green mark diagram. Has any right mapping or comments for it? Thank you. 

BR

Patrick

  • Hi Patrick,

    The EEPROM table is correct, and I think there is some confusion about reading it.

    The EEPROM table shows that for EEPROM address 0x19, bits 4:1 map to SMBus Slave Register 0x2F[3:0], and these values are relevant to the Assert/De-assert threshold of CH4, not CH1 as you have pasted below.

    Please refer to the following diagram for an explanation of how to read the table:

    It may also be helpful to consult an EEPROM datasheet we wrote several months back to detail how to read the table (see p. 6): http://www.ti.com/lit/an/snla228/snla228.pdf

    Thanks,

    Michael