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DS90C187 / Change Vertical Front Porch during operation

Other Parts Discussed in Thread: DS90C187

Hi Everyone,

Now our customer has evaluated DS90C187, and then plan to change vertical front porch to change frame rate during operation. Then they are concerning if blackout will be happened when changing frame rate during operation. Other input signals like DE, Horizontal Sync or IN_CLK are kept to input during changing vertical front porch.

Please let me know if there is possibility to be happened blackout in this case.

Best Regards,

Sonoki / Japan Disty

  • Hi Satoshi-san,

    Can you describe in more detail about how they are changing the frame rate? What exactly does your customer plan to do when they change the vertical front porch? If you change the frame rate, the internal PLL will require some time to re-lock to the new data rate. This switch in the DS90C187 to lock to a new frequency does not take a long time, but it could be an issue if the customer is constantly trying to switch between very different clock frequencies. If you could provide some more detail about what your customer is going to do when they change the vertical front porch, it will help us determine whether there will be a display error issue.

    Thanks,

    Michael

  • Hi Michael-san,

    Sorry for delayed response. They plan to change the vertical front porch as attached. It need two frame to change to target frame rate and then they do not want to see display error issue.

    Please let me know if you need more information.

    Best Regards,

    Sonoki

  • Hi Sonoki-san,

    Changing the vertical front porch should not be an issue for the DS90C187 as long as the pixel clock remains the same. From what you are describing, changing the frame rate is dependent on changing the behavior of which clock cycle the vertical sync will pulse.

    Having said this, the DS90C187 should not have an issue transmitting the SYNC pulses as they change. However, the end display or monitor following the DS90C187 must be able to process the changing frame rate correctly. In situations like this, it is typical to expect that the endpoint processor will assert a DE (data enable) = Low for the serialized signals while the changing frame rate changes in order to black out the pixels and prevent a screen glitch. The panel will determine how to interpret the transition between different frame rates while operating. The DS90C187 will continue to pass along the SYNC signals without issue, so long as the PCLK is still the same.

    Thanks,

    Michael