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TLK6002 config file

Other Parts Discussed in Thread: TLK6002

customer is using TLK6002, and the applicaiton condition is following: Tclk(transmit clock) is 153.6M, DDR mode,  and reference clock is 122.88M, serders rate is 6.144G, pls share one register file to me. (andy-chen@ti.com). 

  • Hi Chen,

    Unfortunately we do not have a register file with the configuration that customer is using, on the other hand, in TLK6002 datasheet (Section 4.18 - Device Initialization) you will find sequences for various operating modes using the MDIO interface (e.g. 20-Bit Interface Mode (8b/10b Encoder/Decoder Disabled) (All CPRI/OBSAI Rates, etc.)

    I hope this helps.

    Please let me know if you have any concern or query.

    Regards!

    Luis Omar Morán Serna

    High Speed Interface Group

    SWAT Team