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Hi Michael,
I got another issue with Retimer EEPROM mode. Please help to review if you got any experience on this issue yet.
In three test cases below, we use the same Retimer's parameter for both two channels as the previous comment above.
1. With SMBus slave mode : I init Retimer after our 10G interface initialization ==> with this configuration 10G interface is work stable over 1000 times power cycle the board.
2. I Configured retimer in eeprom mode ==> retimer is init when board is powered up, then we init our 10G interface after==> This configure is not stable we got many " retry time out" and "UDP wrong check sum" when put/get file 50M to server( the error rate is 1/246), after that I use our SMBus controller reset CDR of retimer, and I can put/get file normally. We got the attachment as retimer's eye compare image in two case success and unsuccessful.
3. I also tried SMbus slave mode but we init Retimer DS110DF111 before we init our 10G interface. The status is the same with test case [2].
So, I assume that If we init Retimer DS110DF111 before 10G interface, CDR/DFE of retimer will lock the bad 10G signal so the output signal is bad too.
Our goal is use retimer in Eeprom mode without any more CDR reset command and work stable as test case [1]. Please give me your advise to improve CDR/CTLE/DFE adaption in case it's inited before 10G interface. Or any way to move the initialization after 10G interface in eeprom mode.
Thank you very much!!
Ngoc
Hi Ngoc,
It appears that the DS110DF111 is over-equalizing the signal when configured with the EEPROM and initialized before the 10G interface.
For the "Normal" and "Failed" cases what are the register values for Channel Register 0x52? It may be possible to constrain the allowed CTLE adaption process or table to keep the interface at a better equalization solution.
Regards,
Lee