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DS90UB947-Q1 OpenLDI (single-link) input, FPD-Link (Dual-link) output

Other Parts Discussed in Thread: DS90UB947-Q1

Hello,

I would like some clarification on the DS90UB947 datasheet.  Page 1 of the data sheet lists the FPD-link output as being able to handle "up to 96MHz pixel clock" if using a single FPD-Link link.  It also lists the output as being able to handle "up to 170MHz pixel clock" if using dual FPD-Link links. 

Page 6 of the datasheet lists the OpenLDI clock frequency (for a single-link openLDI interface) as 25MHz to 170MHz.  It also lists the OpenLDI clock frequency (for a Dual-link openLDI interface) as 50MHz to 170MHz.

If I'm reading this right, I should be able to use a single-link OpenLDI interface up to 170MHz as the input to the DS90UB947 and transmit that over a Dual-link FPD-link interface to the DS90UB948 deserializer.  Is that correct?


Thanks,

Jason

  • 947 supports up to 170MHz PCLK on the OLDI input. The FPD3 operating in single link mode is limited to the effective 96MHz PCLK rate. Therefore in the case of 170MHz OLDI single input, FPD3 dual output will correspond to 85MHz*2.

    Dac Tran

    SVA APPS

  • Hi, Jason and Dac,

    This is very valuable post for me, let me join the discussion.


    <Q1>:

    So the max specification of OpenLDI Clock Frequency (Single Link) is not 170MHz, but 96MHz.
    This should be typo.
    And this limitation of maximum frequency is coming from max line-rate of FPD3, 96MHz x 35 = 3.36Gbps/FPD3 lane.
    Correct?


    <Q2>:
    Also for Dual Link case as specified above, however actual input "PCLK" frequency is one-half of this value.
    This means, min 25MHz to 85MHz.
    In this case, max line-rate of FPD3 is limited to 2.975Gbps/FPD3 lane (85MHz x 35), however, since we have dual FPD3 lanes, so total amount of data can be consider as double (around 6Gbps).
    So display resolution which have the total amount of data is higher than 95MHz, it's required to use dual OLDI inputs and dual FPD3.
    Correct?

    I have similar post which try to make sure how ds90ux947 can support 1080p60. It's greatly appreciated, if you can look into this post, too!

    [ DS90UH947 ] 1080p60 Support
    e2e.ti.com/.../541982

    Thanks,
    Ken

  • Hi Dac,

    Can you please look into my post above?
    Also, I have simple drawing as below.



    I believe this would be helpful for other engineer, too.
    Thanks,
    Ken

  • Per the diagram, Single-Single and Dual-Dual configurations are supported. Single input 170 MHz OLDI is not supported and limited to 96 MHz max.

    Dac Tran

    SVA APPS

  • Hi Dac,

    Can you please update the Datasheet to reflect this.  The datasheet clearly states that Single-link OLDI is supported up to 170MHz.

  • Jason, I agree with you.

    Hi Dac, it should be helpful for the engineer if you can update datasheet and state is clearly.

    Updated my drawing...


    Thanks,
    Ken

  • Sorry to interrupt, according to current datasheet, OpenLDI clock requirement is still up to 170MHz when OpenLDI is used as single link.

    Is above information correct ?

    Best Regards,

     

  • Machida-san,

    As far as I know, "SNLS479A –NOVEMBER 2014–REVISED JANUARY 2016" "SNLS454 –NOVEMBER 2014" is still latest datasheet which I can find on TI.com. I suppose that the datasheet has not been updated yet.

    Thanks,
    Ken

  • Ken-san,

    Thank you for your information.
    Do you have application note or something which "maximum frequency is 96Mhz in case of single OLDI input" is described ?
    (This is big issue for customer...)

    Best regards,
    Machida
  • Machida-san,

    I'm sorry that I don't have the document other than datasheet.
    However the datasheet of DS90UB947-Q1 describes PCLK range at some pages like...





    I hope this helps you.
    Thanks,
    Ken

    Suimasen, oyaku ni tatenakute.