Which SATA re-drivers support 2-meter cables at 3 Gbps?

Hi Adam,

I am not sure about the LVCP601 limit.  It would help to understand how much attenuation you can expect in the external cable assembly.  This would allow us to compare the cable assembly loss vs. LVCP601 performance capabilities   The DS64BR111 will have enough input equalization and output de-emphasis to drive a 2m cable well at 3 or 6 Gbps rates.

Regards,

Lee 

Lee,

Thanks so much for the reply.

It turns out that I will need to use a different part than the SN75LVCP601 because the LVCP601 is only rated for commercial temps and I need industrial.

I think I'd like to commit to using the DS64BR111 (which is offered in industrial temp), but there are some concerns I have about the part:

1) The spec calls this part a repeater, not a redriver.  I'm not sure what the difference is, or whether this part being a repeater will eliminate it from being used because it is not a "re-driver".  From what I've read on the forum, the difference is related to passing the OOB data bursts through.  There may be other differences that I'm not aware of.  The DS64BR111 specifically says "Applications: SATA 3/6 Gbps (with OOB Detection)", hopefully this is a non-issue.

2) The DS64BR111 offers configuration via pin straps, I2C interface, or EEPROM.  In the reference board that I am basing my new board on, the SN75LVCP601s have their pin controls (EQ1, EQ2, DE1, and DE2) controlled by GPIOs of an FPGA (DEW1 and 2 are pulled up).  I can connect these same pins on the DS64BR111 to the FPGA, since their function is similar to that of the LVCP601.  What I'm concerned about is whether I'd ever need to override the register defaults.  If I tie the MODE pin to ground with a 20K resistor, that sets up the chip for "eSATA mode, Fast OOB, Auto Low Power on 100 uS of activity, SD stays active".  I think this is probably the mode I need.  But looking at Table 9, SMBus Register Map, the following fields have defaults that I might need to change if they are not overridden by the MODE pin setting (primarily, eSATA mode setting for ChA and ChB):

Reg. 0x04 (Control 3) bits [7:6]: "eSATA Mode Enable" defaults to 00, which is "disabled".  I want both channels to be enabled at startup.  Hopefully MODE = 20K to GND overrides this default.

Reg. 0x04 (Control 3) bits [1:0]: "EQ CONTROL" defaults to 00, which is EQ Stage 4 is OFF.  Hopefully Stage 4 is only needed in extreme configurations?

Reg. 0x23 (BR111 CH A VOD) bits [4:2]: "VOD_CH0[2:0]" defaults to 000, which is 700 mV.  This is lower than the default for CH B.  I have heard that typical VOD need not be higher than 700 mV, but what if we need it?

Reg. 0x2D (BR111 CH B VOD) bits [4:2]: "VOD_CH0[2:0]" defaults to 011, which is 1000 mV.  Why did you make CH B higher than CH A?   Is it because you would typically use CH B for the receive channel from the SATA device, which is far away from the repeater, but the host is on the same PCB so the chip-to-chip interface being on the same PCB and close by requires much less VOD?

Bottom line is, I'm trying to drop in a new part that will replace the LVCP601s to drive a 2m cable and not require host intervention (other than setting the EQ and DEM pins with our FPGA) to change defaults.

Thanks,

Adam

Hi Adam,

Using pin control on the DS64BR111 will work well for SATA applications.  We have found setting the MODE pin = High gives the best OOB transparency even in noisy systems and this will ensure both channels are operating at the start.  The DS64BR111 equalizer is quite strong, a 2m cable will not require too much EQ.  I would suggest starting with the minimum setting and working your way higher to achieve the best eye opening.  I would expect just a couple levels up will result in optimal EQ response.  

For DEM also start with the minimum setting.

For most SATA applications VOD=700mV is good, set this VOD in both directions.

Regards,

Lee

Lee,

Thanks again for your quick reply. Regarding the MODE pin, what does "eSATA Mode" do specifically? And do I lose that functionality (if it's critical for eSATA, which to me means SATA with an external cable) if I set MODE high (Continuous Talk) instead of 20K to ground?

Also, is it a problem if Reg. 0x04 (Control 3) bits [7:6]: "eSATA Mode Enable" takes on the default of 00? This implies "not eSATA mode" and again I'm concerned that I'm losing functionality. I assumed that if I tie MODE to GND with 20K ("eSATA Mode"), that will get those register bits set to 'b11 instead of 'b00.

Adam

Hi Adam,

From the perspective of our redrivers, eSATA mode is like a low-power SATA version, where power to the channels is cut when no input signal is sensed for a long time (typically ~100 us). In low power mode, sending a signal into the device channel will turn the channel back on, and the device will work normally again once fully powered. In most applications for this part, SAS/SATA mode is used more often than eSATA.

I would say that the only functionality you would "lose" when setting MODE = H for Continuous Talk is that the redriver no longer actively mutes the channel based on detected signal activity. However, this is not necessarily a lost functionality in some respects, since the ASICs on either side of the redriver are ultimately responsible for performing the appropriate power-up/power-down sequencing for the channels. If the channel is not especially noisy such that amplified noise through the redriver appears like an active signal, then leaving the redriver in Continuous Talk will not prevent the device from working in an eSATA environment.

When eSATA Mode Enable is left as default 00, the device is not in eSATA mode, as you have suggesting, meaning that the channel does not implement auto-low-power after 100 us of inactivity. I am not sure about whether pulling the MODE pin via 20k to GND will get these register bits to become 11'b in the register.

I advise that you first try the settings that Lee suggested, then compare them with the device in eSATA mode to determine which setting yields the best performance.

Regards,

Michael

Lee/Michael,

Thanks again for your responses.

The next question I have regarding the DS64BR111 is the simultaneous use of pin-mode and SMBus-mode.

The SDA and SCL pins are shared with 4-level strapping inputs, with configurations such as 1K to GND, 20K to GND, float, or 1K to VDD.

The spec implies that the chip will dynamically switch to SMBus mode if the ENSMB pin goes high.

The goal of my design is to strap the chip with resistors and ENSMB low, power up that way, but then allow the ENSMB pin to go high and allow the local processor to tweak any register values it wants to.  In the presence of the 4-level strap resistors, how can an SMBus operate in this mode, where there are not necessarily the weak pullups required to maintain an open-collector I2C bus that idles high?

Did the chip designers think about this?   Or is there a way to make it work?  Or can it not work?

Thanks,

Adam

Hi Adam,

It is possible to switch over, but I would not recommend it between Pin and SMBus modes.  Going from EEPROM to SMBus is generally the way most designs work when multiple configurations are used.

Going with pin mode I recommend setting MODE = High.  This will be highlighted in an upcoming application note on SAS/SATA applications.  This setting has helped to reduce OOB distortion in several designs recently.

Regards,

Lee