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SCAN90CP02 External Parts Questions

Thomas Manges
Prodigy 40 points
Other Parts Discussed in Thread: SCAN90CP02, DS25CP102

Hi all,

I am using LVDS signals around 500 Mbps.

Currently upgrading to a crosspoint switch with pre-emphasis. Looking into SCAN90CP02 but don’t want to use JTAG feature. I looked for other options for crosspoint with pre-emphasis, DS25CP102 was the only other one I found from TI but this one was too costly.

Link to tech docs for SCAN90CP02 

Q1: If using SCAN90CP02 and not using JTAG with it, can I simply leave those pins N/C?  Or will I need pull-ups/pull-downs? If so, which ones will need ups/downs? The evaluation sheet wasn’t very helpful here since I don’t wish to ever use this feature and I could use some advice.

Q2: SCAN90CP02 has five power inputs.  The data sheets states “at least 4 low ESR 0.01 µF bypass capacitors should be connected from VDD to GND plane.”  However, the evaluation kit document schematic (http://www.ti.com/lit/ug/snlu078/snlu078.pdf) shows two caps at each power input . I have limited space on my board and don’t want to use this many caps if need be. I think one 0.01 µF bypass cap at each power will suffice but wanted another opinion on this.  

Q3: I didn’t see any mention of internal pull down/up resistors within the chip for the select and enable pins.   I wanted to simply double check that I needed to pull the select and enable pins to ground externally if I want to input logic “0”. 

If you could help me out quickly, that would be much appreciated!

-Thomas

  • 0
    TI__Mastermind 29635 points
    Hi Thomas,

    1. If you are not using the JTAG pins, I recommend tying TDI and TMS to VCC with a small resistor, such as 4.7k. This is to ensure that the JTAG state machine is not running through its own state machine, as tying TDI and TMS high leaves the JTAG state machine idle. TCK and TDO can be left floating. TRST/ can be tied low to keep the JTAG state machine idle as well. In either case, the JTAG boundary scan operation is completely separate from regularly signal chain data.

    2. The datasheet specifies that there should be at least 4 x 0.01 uF bypass caps TOTAL from VDD to GND. Typically we expect to see one on each VDD pin. The SCAN90CP02EVVK actually takes it one step further by including a 0.1 uF cap on each VDD pin in addition to the 0.01 uF that is already used. I think if you are not concerned with noise coming from your power supply at low frequency, then you can have just the one 0.01 uF bypass cap. The choice of how many bypass caps are needed, as well as the value of the bypass caps, is largely design dependent. There is not a "one-size-fits-all" solution, so you can certainly remove the extra caps per VDD pin as required by your board limitations.

    3. These inputs should be tied to the desired 0 or 1 level externally.

    Regards,

    Michael
  • 0 in reply to Michael Lu (Santa Clara)
    Prodigy 40 points
    Thanks Michael! I really appreciate you answering quickly and clearly. This is exactly what I was looking for.

    Once again, Thanks!

    -Thomas