DS90CR285 mapping

Hi Loic,

There is no specific requirement for mapping the RGB bits to the DS90CR285 as long as they match the parallel output mapping on the deserializer side. With this having been said, the OpenLDI standard defines the typical TFT data mapping as defined in the following application note:

http://www.ti.com/lit/an/snla014/snla014.pdf

For typical mapping into the transmitter, please refer to Table 1 in the column labeled "24-bit Tx (C385)."

Thanks,

Michael

Hello,

thanks for your answer.

do you have same document about DS90CR286 please ?

thnaks

best regards

Hi Loic,

You can actually use the same application note as the one I attached in the previous thread. In the application note, to reference Rx devices like the 28-bit DS90CR286, look for the column titled 24-bit Rx (CF384A).

Thanks,

Michael

Hello Michael,

I have this interface with my LCD but it is not same maaping that is indicated in your last document.

please confirm that I need to connect for Txout0 G0 R5 R4 R3 R2 R1 R0 instead G2 R7 R6 R5 R4 R3 R2 indicated in your doc

thanks

best regrads

Hi Loic,

Can you provide a datasheet for the LCD panel? It will be the only way that I can confirm.

There are two popular schemes in which to map the RGB onto the OpenLDI LVDS pairs. The first is to map the 2 LSBs of each 8-bit color to TxOUT3, and the other is to map the 2 MSBs of each 8-bit color to TxOUT3. Usually the second type of mapping is preferred so that you can leave this TxOUT3 pair disconnected in the event that a 6-bit RGB application is required.

The document that I provided goes under the assumption that the LSBs are mapped to TxOUT3.

From your question, it is unclear to me which scheme the LCD panel requires after the DS90CR286A device. If you could provide a diagram of the mapping from your source to DS90CR285, the proposed mapping from DS90CR286A to LCD, and the LCD panel datasheet, I will be able to help confirm the mapping for you.

Regards,

Michael

please find mapping lcd


best regards

Hi Loic,

Thanks for the mapping. After reviewing the contents of this thread, is my understanding correct that your design does not use a DS90CR286A device at all? It seems to me that you have the following configuration:

FPGA/ASIC -> DS90CR285 -> LCD Panel

Please confirm if this is correct.

From this mapping you have provided, you will need to map "TxOUT0/RxIN0 => G0 R5 R4 R3 R2 R1 R0." This means that this LCD panel is expecting the MSBs to be located in "TxOUT3/RxIN3."

Do you have the mapping of the FPGA/ASIC outputs going into the DS90CR285 LVCMOS parallel TxIN0-27 inputs? If we know this mapping, we will be able to tell if the bits are mapped according to the positions they will appear within each LVDS data pair:

Thanks,

Michael