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I/O Standard when interfacing LMH1219 to an FPGA

Other Parts Discussed in Thread: LMH1219

The question says it all.  I'm trying to figure out what settings to use on my FPGA's transceivers in order to correctly receive the output of the LMH1219.  There's a few options on the FPGA side:  LVDS, CML, etc.  

Thanks!

Craig