DS125BR800A: The placement of DS125BR800A for PCIE 3.0 TX/RX

Hi,

3 connector interfaces and 35 inches of trace is a difficult PCIe 3.0 application.  Adding up the attenuation.

CPU package - 2 dB

Connectors - 3 dB

Device package - 1 dB

Trace (at 0.8 dB/in) - 28 dB

This totals up to ~ 34 dB loss.  For this to work, the crosstalk level will have to be very carefully controlled.  In addition, the DS125BR800A placement will need to be biased towards the PCIe Rx side of the links. 

For example:

CPU (Tx) -> 10 in -> con -> 8 in -> con -> 12 in -> BR800A -> 2 in -> con -> 3 in -> Device (Rx)

CPU (Rx) <- 8in <- BR800A <- 2 in <- con <- 8 in <- con <- 14 in <- con <- 3 in <- Device (Tx)

The DS125BR800A is a linear equalizer so it cannot differentiate between the victim signal and a crosstalk signal.  I would estimate the crosstalk would need to be close to -45 dB for the application to work well. 

Regards,

Lee

Hi Lee，

      The placement must be picture 1 or picture 2 in my system, which placement is better?

PS: PCB is M4.

The best placement depends on the direction of signal travel.  For PCIe signals will be traveling upstream and downstream.

Placement #1 is better for CPU Tx signals (going from CPU to Device)

Placement #2 is better for Device Tx signals (going from Device to CPU)

Regards,

Lee

Hi Lee：

       Can it work normally when swap P/N in the input/output？

Yes, swapping the P/N signals on the input and the output will invert the original signal twice. This results in the "true" signal after the output pin swap.

Regards,

Lee