SN65DSI83: SN65DSI83 initial issue

Hello Yang,

Could you use the DSI Tuner to configure the DSI83? Please, share the .dsi file.

Confirm that the LVDS CLK output is running correctly? Correct levels, frequency (51.2MHz), no jitter?

Regards

Please see the attached of panel spec and dsi file.  Please advise your comments.  

Thank you,

Jason5822.DSI and panel spec.zip

Hi Joel,
Our customer(Jason) attached the .dsi file & panel specification, please kindly help to review & check what problem is it?

Thanks
Regards,

Ken Y

Hello Jason,

Could you try changing to FORMAT 2 in the DSI Tuner? Check that the panel is configured as 8bit LVDS.

Confirm that the LVDS CLK output is running correctly? Correct levels, frequency (51.2MHz), no jitter?

Regards

Hi:

Could you try changing to FORMAT 2 in the DSI Tuner?

The result is the same.

Check that the panel is configured as 8bit LVDS.?

Yes, LVDS is 8bits. We can show test pattern.

Confirm that the LVDS CLK output is running correctly? 

Yes, LVDS clock is 51.2M.

Thanks

Hello Jason,

As per your comments above, we know that the test pattern is correct (no flicker). So can discard an issue with the LVDS output. 

Now, you have to chek the following points:

1. Does the actual number of active DSI data lanes match the SN65DSI8x register configuration?

2. Signal integrity on DSI CLK and HS data lanes 

3. Does the LP to HS and HS to LP timing meet the requirements specified in the MIPI DPHY spec?

4. Is DSI_CLK range register programmed to match the actual DSI CLK rate? 

5. Does the line time on the DSI input match the output line time requirement?

6. Is the recommended initialization sequence followed as described in the device datasheet?

There are error reporting registers that the system software can read to help with system debug. The error status registers are at offset 0xE5 and/or E6. Individual error conditions at address 0xE5 and/or 0xE6 can be reported via IRQ pulses by enabling the corresponding error status bits at offset 0xE1 and/or 0xE2. Refer to the datasheet for details in the IRQ operation and the error reporting mechanism.

Hi Yangken:

Did you resloved the this problem, if you had worked out it, please share your code to me, I'm chinese too, you can send your code to my email, lxx1988515@126.com

Hi Joel :
Thanks you, I will follow your suggestion, and I will share the .dsi file later.