DS90UB925 datasheet point out GPO_REG[8:4] are just as output.
And the registers 0x11 shows bit 6,5,2,1 are reserved.
But I find the materials which is guide to enable GPIO.
Application Report
SNLA234–November 2015
In this report, we can see:
Enabling GPIO8 for the 925 to 926 Direction
1. Set the DS90UB925 GPIO8 (I2S_CLK) as an input, set register 0x11[4] =1 and 0x11[5] =1.
2. Set the DS90UB926 GPIO8 (I2S_CLK) as an output, set register 0x21[4] =1 and 0x21[6] =1.
1.2.2 Enabling GPIO7 for the 925 to 926 Direction
1. Set the DS90UB925 GPIO7 (I2S_WC) as an input, set register 0x11[0] =1 and 0x11[1] =1.
2. Set the DS90UB926 GPIO7 (I2S_WC) as an output, set register 0x21[0] =1 and 0x21[2] =1.
So，Is the datasheet updated ?
what's the define of the bit 5 and bit 1 in 0x11?
