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DS90UB924-Q1: About MODE_SEL

Part Number: DS90UB924-Q1

Hi team,

 Please let me ask you a question about DS90UB924Q1.
 I understand that the MODE_SEL are read only once after
 PDB goes high and are latched.

 In addition,if a customer wants to change the MODE by MODE_SEL pin
 in the power-on state,the PDB pin will need to be pulled down to LOW once.

 Is my understanding correct?

Best regards.
Tsuyoshi Tokumoto

  • Hello,

    The MODE_SEL is monitored continuously after PDB is high.  It is not recommended to switch operating modes during operation. Best practice would be to apply PDB reset or software reset using register 0x01 after changing MODE_SEL state.

    Regards,

    Liam

  • Liam-san,

    Thank you very much for your prompt replay.
    I understand your explanations well.

    In the past posts regarding DS90UB928, it was described as
    follows, so I confirmed it about DS90UB924Q1 just in case.

    "IDx and MODE_SEL are read once after PDB goes high and are latched,
    so you want the voltages on those pins to be stable before PDB ramps up."

    - Excerpt from the past post(e2e.ti.com/.../f
        /138/p/341851/1194784?tisearch=e2e-sitesearch&keymatch=mode_sel%20AND%20PDB#1194784).


    Thank you and best regards.
    Tsuyoshi Tokumoto

  • Hello Tokumoto-san,
    Please allow some clarification to previous answer:

    The MODE_SEL is monitored after PDB is high and will be latched in after 1 to 2 ms. It is not recommended to switch operating modes during operation. Best practice would be to apply PDB reset or software reset using register 0x01 after changing MODE_SEL state. Changing MODE_SEL voltage during operation would require PDB reset to apply new MODE, or forcing MODE change by register programming.

    Regards,
    Liam
  • Hello Liam-san,

      Thank you very much for your detailed explanations,
      and I apologize to you for my lack of clarity as to this query.

      My query has been cleared up now.

    Thank you and best regards.
    Tsuyoshi Tokumoto