Hi team,
I'm considering to use 953 and 954 system.
I have some questions for register setting and usage of setting.
<DS90UB954>
・0x4C FPD3_PORT_SEL Register
Is the "RX port x registers" in this register and the "FPD3 RX Port x Reserved Registers" of the 0xB0 IND_ACC_CTL Register the same?
・0xD5 AEQ_MIN_MAX Register
Is there a calculation formula to show the setting of AEQ and its effect?
I do not know what kind of setting should be done.
Which register is it shown reg_35 [5: 4] described in ADAPTIVE_EQ_FLOOR_VALUE's description?
<DS90UB953>
・0x01 RESET_CTL_Register
What is the difference DIGITAL_RESET_1 and 0?
・0xB0 IND_ACC_CTL
I did not find the description about 001: FPD 3 TX Registers in IA_SEL, but what can be set up when 001 is written to IA_SEL?
I am troubled with setting registers.
Please tell me about the registers above.
Best regards,
Tomoaki Yoshida