Part Number: DS90UH948-Q1
I would like you to confirm about requirement for skew of RIN0 and RIN1.
In general, we believe that RINx should be traced same length. But could you please confirm which error range should be available ?
In reply to Ryuuichi machida:
I really need your feedback about this.
Could you please send me your status ?
In reply to Davor Glisic:
Thank you for your reply.
>The DS90UH948-Q1 features de-skew functionality that allows up to 4 pixel clocks of skew between the FPD-Link III lanes.
If you know, could you please tell me which document above sentence is described ?
(If this information is not described in any official document, please let me know. At least I can not find this on datasheet.)
All content and materials on this site are provided "as is". TI and its respective suppliers and providers of content make no representations about the suitability of these materials for any purpose and disclaim all warranties and conditions with regard to these materials, including but not limited to all implied warranties and conditions of merchantability, fitness for a particular purpose, title and non-infringement of any third party intellectual property right. TI and its respective suppliers and providers of content make no representations about the suitability of these materials for any purpose and disclaim all warranties and conditions with respect to these materials. No license, either express or implied, by estoppel or otherwise, is granted by TI. Use of the information on this site may require a license from a third party, or a license from TI.
TI is a global semiconductor design and manufacturing company. Innovate with 100,000+ analog ICs andembedded processors, along with software, tools and the industry’s largest sales/support staff.